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review.coreboot.org / coreboot / bfb11bec3b3fec638adf864a9b9b2cff6671fed8 / src / northbridge
  1. 5c66f08 haswell: don't add a 0-sized memory range resource by Aaron Durbin · 12 years ago
  2. 69efaa0 Google Link: Add remaining code to support native graphics by Ronald G. Minnich · 11 years ago
  3. 1570260 haswell: Fix BDSM and BGSM indicies in memory map by Aaron Durbin · 12 years ago
  4. 1fef1f5 haswell: reserve default SMRAM space by Aaron Durbin · 12 years ago
  5. c12ef97 haswell: resource allocation by Aaron Durbin · 12 years ago
  6. 26e7dd7 haswell: more ULT/LP support and minor tweaks by Duncan Laurie · 12 years ago
  7. 7116129 haswell: Add VGA PCI ID mappings by Aaron Durbin · 12 years ago
  8. df7be71 haswell: Add ULT device IDs by Duncan Laurie · 12 years ago
  9. f72ad02 graysreef: update platform information by Aaron Durbin · 12 years ago
  10. 89f79a0 haswell: remove explicit pcie config accesses by Aaron Durbin · 12 years ago
  11. c1989c4 haswell: add PCI id support by Aaron Durbin · 12 years ago
  12. b6b5aa1 haswell: Remove logic to send dram init done to ME by Aaron Durbin · 12 years ago
  13. 30c3900 haswell: notes and updates. by Aaron Durbin · 12 years ago
  14. 8256a9b haswell: align pei_data structure with intel-framework by Aaron Durbin · 12 years ago
  15. b9adf7b haswell: use #defines for constants in udelay.c by Aaron Durbin · 12 years ago
  16. ce36b12 haswell: Add LPT LP device IDs to platform report by Duncan Laurie · 12 years ago
  17. 67113e9 haswell: Update GPU power management setup by Duncan Laurie · 12 years ago
  18. 6d04f0f haswell: always use MMIO PCI config accesses by Aaron Durbin · 12 years ago
  19. 76c3700 haswell: Add initial support for Haswell platforms by Aaron Durbin · 12 years ago
  20. e7ae96f Add Intel Panther Point USB3 initialization by Marc Jones · 12 years ago
  21. 3b2653b AMD Fam14: Add SPD read functions to wrapper code by Martin Roth · 11 years ago
  22. 41dd3db Intel e7505: provide get_top_of_ram by Kyösti Mälkki · 12 years ago
  23. a46a712 GPLv2 notice: Unify all files to just use one space in »MA 02110-1301« by Paul Menzel · 11 years ago
  24. fd611f9 Drop CONFIG_WRITE_HIGH_TABLES by Stefan Reinauer · 11 years ago
  25. a8ae1c6 Whitespace: Replace tab character in license text with two spaces by Paul Menzel · 11 years ago
  26. 92f03c0 AMD Family12h: Fix warnings by Martin Roth · 12 years ago
  27. 0aa37c4 sconfig: rename lapic_cluster -> cpu_cluster by Stefan Reinauer · 12 years ago
  28. 4aff445 sconfig: rename pci_domain -> domain by Stefan Reinauer · 12 years ago
  29. 600784e spi.h: Rename the spi.h to spi-generic.h by Zheng Bao · 12 years ago
  30. 8cc8468 Intel: Replace MSR 0xcd with MSR_FSB_FREQ by Patrick Georgi · 12 years ago
  31. f04e68e Add MMCONF resource to AMD fam15 PCI_DOMAIN by Steven Sherk · 12 years ago
  32. 7407f43 Family 12: Update for string portability by Mike Loptien · 12 years ago
  33. e133aab Family 15tn: Update for string portability by Mike Loptien · 12 years ago
  34. 6eced51 Family 10: Update for string portability by Mike Loptien · 12 years ago
  35. 8401453 Family 15: Update for string portability by Mike Loptien · 12 years ago
  36. 1cbabb0 Add MMCONF resource to AMD fam15tn PCI_DOMAIN by Steven Sherk · 12 years ago
  37. 7fb692b Fam15tn: Move SPD read from mainboards into wrapper by Martin Roth · 12 years ago
  38. 6fe0cab Extend CBFS to support arbitrary ROM source media. by Hung-Te Lin · 12 years ago
  39. 5fc64dc Rename family15 pci northbridgeops functions. by Steven Sherk · 12 years ago
  40. f434058 Rename family15tn pci northbridgeops functions. by Steven Sherk · 12 years ago
  41. 58089e8 Family 14: Update for string portability. by Mike Loptien · 12 years ago
  42. d5c998b Add MMCONF resource to AMD fam14 PCI_DOMAIN. by Marc Jones · 12 years ago
  43. 8a49ac7 Rename fam14 pci northbridge ops functions. by Marc Jones · 12 years ago
  44. 73e86a8 F15tn: Fix all warnings, enable warnings as errors by Martin Roth · 12 years ago
  45. 2892023 AGESA F15tn: Move callouts into northbridge wrapper by Martin Roth · 12 years ago
  46. 2d88151 F15tn: Modify devicetree to fix S3 resume by Martin Roth · 12 years ago
  47. 816e9d1 Support for Celeron 1007U by Stefan Reinauer · 12 years ago
  48. 9027845 rd890: clear IO-APIC before setup by Aladyshev Konstantin · 12 years ago
  49. cbf3d40 Add function to map vendor/device to generic VBIOS IDs by Dave Frodin · 12 years ago
  50. 8d71155 Rename devices -> device by Stefan Reinauer · 12 years ago
  51. 5079a0d Remove assembly coded log2 function by Ronald G. Minnich · 12 years ago
  52. bbc880e amdk8/amdfam10: Use CAR_GLOBAL for sysinfo by Patrick Georgi · 12 years ago
  53. 721265b Drop driver-y from GM45/ICH9/RK9 by Stefan Reinauer · 12 years ago
  54. e135ac5 Remove AMD special case for LAPIC based udelay() by Patrick Georgi · 12 years ago
  55. 23f38cd Get rid of drivers class by Patrick Georgi · 12 years ago
  56. 2efc880 intel/gm45: new northbridge by Patrick Georgi · 12 years ago
  57. 3c84261 yabel: Use X86_* instead of the more verbose M.x86.REG_* by Patrick Georgi · 12 years ago
  58. 199b09c x86 realmode: Use x86emu register file + defines by Patrick Georgi · 12 years ago
  59. 503af72 x86 realmode: Adapt to x86emu/YABEL style return codes by Patrick Georgi · 12 years ago
  60. 3e77eb6 x86emu: Move realmode handler into own directory by Patrick Georgi · 12 years ago
  61. e4d40b4 Drop no-op bootblock.c by Kyösti Mälkki · 12 years ago
  62. 6446626 Use new system agent binaries by Stefan Reinauer · 12 years ago
  63. c533463 VIA chipsets: fix compilation without real mode code by Stefan Reinauer · 12 years ago
  64. 313ec9d Sandybridge: Set PEG clock gating by Marc Jones · 12 years ago
  65. 7e8c8e9 Add PCIe init and NMode flag to PEI data structure by Stefan Reinauer · 12 years ago
  66. e8179b5 Add ddr3lv_support flag to pei_data structure by Duncan Laurie · 12 years ago
  67. 53508fe pei_data.h: Fix comment by Marc Jones · 12 years ago
  68. 48a4a7f Provide MRC with a console printing callback function by Vadim Bendebury · 12 years ago
  69. e5a0a5d Initial IGD OpRegion implementation by Stefan Reinauer · 12 years ago
  70. ad67791 Avoid using hardcoded values in MRC cache code by Vadim Bendebury · 12 years ago
  71. a1ea822 Make coreboot use the offset parameter in cbfstool create by Stefan Reinauer · 12 years ago
  72. 4c8027a Make register/value lists const by Stefan Reinauer · 12 years ago
  73. 357bb2d SandyBridge/IvyBridge: Use flash map to find MRC cache by Stefan Reinauer · 12 years ago
  74. c6b9f92 Add missing newline in error message by Stefan Reinauer · 12 years ago
  75. becacec AMD G34 CPU: change lapic_id in northbridge.c to accommodate G34 CPU by Siyuan Wang · 12 years ago
  76. cf81b82 CMOS: Move MRC seed offset into upper bank by Duncan Laurie · 12 years ago
  77. 6f05c2eb AMD rd890 late.c: Don't enable PCIe ports after PCIe init. by Siyuan Wang · 12 years ago
  78. fa678bb AMD agesa family15: PCI domain should scan bus from 0x18.0 by Siyuan Wang · 12 years ago
  79. 1e0ddf6 Fix some issues with new "reference" toolchain by Stefan Reinauer · 12 years ago
  80. 3e9155d northbridge/sch: move the \n so it reads a little better by Sebastian Andrzej Siewior · 12 years ago
  81. 59e3e02 northbridge/sch: read the size of main memory from the proper register by Sebastian Andrzej Siewior · 12 years ago
  82. 50dd47b northbridge/sch: Read the GPU memory from the correct PCI device by Sebastian Andrzej Siewior · 12 years ago
  83. 66fa9e2 northbridge/sch: don't overwrite hightables with GPU / TSEG memory by Sebastian Andrzej Siewior · 12 years ago
  84. 9aeb694 hpet: common ACPI generation by Patrick Georgi · 12 years ago
  85. 0279036 Remove chip.h files without config structure by Kyösti Mälkki · 12 years ago
  86. 72cee54 HAVE_HIGH_TABLES is gone by Patrick Georgi · 12 years ago
  87. 128c7d7 agesa fam15 northbridge: change lapic_id to accommodate two CPUs by Siyuan Wang · 12 years ago
  88. 87213b6 Fix AMD UMA for RS780 by Kyösti Mälkki · 12 years ago
  89. c33f1e9 AMD northbridges: factor out CPU allocation by Kyösti Mälkki · 12 years ago
  90. cd9fc1a AMD northbridges: rewrite CPU allocation by Kyösti Mälkki · 12 years ago
  91. fee73df Auto-declare chip_operations by Kyösti Mälkki · 12 years ago
  92. dbc4739 AMD northbridge: copy TOP_MEM and TOP_MEM2 for distribution by Kyösti Mälkki · 12 years ago
  93. 7874e9d Sandybridge: Fix integer overrun in romstage udelay() by Stefan Reinauer · 12 years ago
  94. cf8e466 Cleanup coreboot memory table includes by Kyösti Mälkki · 12 years ago
  95. 7bdf85b Move cpus_ready_for_init() to AMD K8 by Kyösti Mälkki · 12 years ago
  96. 9ca1c0a Sandy/Ivy Bridge and Cougar/Panther Point: Fix names by Stefan Reinauer · 12 years ago
  97. ffb6bdd AMD f15: Change multiply ONE_MB to bit shifting (Propagation) by zbao · 12 years ago
  98. 15dc3cc AMD f15 nb: Remove the misleading 0x100 from the limitk (Propagation) by zbao · 12 years ago
  99. 49bb26a4 AMD NB: Limit the device field to 5 bits. (Propagation) by zbao · 12 years ago
  100. d462736 Limit the device field to 5 bits. by zbao · 12 years ago