Gitiles
Code Review Sign In
review.coreboot.org / coreboot / b1260553be842dd82b0b022dd40a22527d3e3659 / src / arch
  1. 0638b60 arch/arm & arm64: Remove unnecessary whitespace before "\n" by Elyes HAOUAS · 8 years ago
  2. 363526c arch/riscv: Improve and refactor trap handling diagnostics by Jonathan Neuschäfer · 8 years ago
  3. 4d6ef3a arch/riscv: Set the stack pointer upon trap entry by Jonathan Neuschäfer · 8 years ago
  4. 1394bba arch/riscv: Fix the page table setup code by Jonathan Neuschäfer · 8 years ago
  5. c42b591 arch/riscv: Update encoding.h and dependent files by Jonathan Neuschäfer · 8 years ago
  6. 3731903 acpi: Generate object for coreboot table region by Duncan Laurie · 8 years ago
  7. 5690f0e src/arch/riscv/id.S: Don't hardcode the strings by Jonathan Neuschäfer · 8 years ago
  8. 21a5bff ACPI: Add code to create root port entry in DMAR table by Werner Zeh · 8 years ago
  9. d4d7695 ACPI: Add code to include ATSR structure in DMAR table by Werner Zeh · 8 years ago
  10. cc5be8b arch/riscv: Add include/arch/barrier.h by Jonathan Neuschäfer · 8 years ago
  11. 0cd338e Remove non-ascii & unprintable characters by Martin Roth · 8 years ago
  12. 049b462 arch/x86: Enable postcar console by Lee Leahy · 8 years ago
  13. f67e2cf arch/x86: Display MTRRs after MTRR update in postcar by Lee Leahy · 8 years ago
  14. 777ea89 src/arch: Capitalize CPU, RAM and ROM by Elyes HAOUAS · 8 years ago
  15. 8e63017 arch/riscv: Refactor bootblock.S by Jonathan Neuschäfer · 8 years ago
  16. 62bd9f9 arch/riscv: Only initialize virtual memory if it's available by Jonathan Neuschäfer · 8 years ago
  17. 0cc02ef arch/riscv: Remove spinlock code from atomic.h by Jonathan Neuschäfer · 8 years ago
  18. 5f4b4c4 arch/x86: Add bootblock and postcar support for SOC MTRR access by Lee Leahy · 8 years ago
  19. 4cfde2a arch/x86: Generate a map file for the postcar stage by Lee Leahy · 8 years ago
  20. 99f1b2f arch/x86: Organize ramstage to match other stages by Lee Leahy · 8 years ago
  21. e82b505 arch/x86: Move romstage files into romstage section by Lee Leahy · 8 years ago
  22. a749150 arch/x86: Move postcar stage commands into place by Lee Leahy · 8 years ago
  23. 1b1d4b7 arch/riscv: Enable unaligned load handling by Jonathan Neuschäfer · 8 years ago
  24. 47995fb arch/riscv: Remove enter_supervisor by Jonathan Neuschäfer · 8 years ago
  25. b8e67ac arch/riscv: Change all eret instructions to .word 0x30200073 (mret) by Jonathan Neuschäfer · 8 years ago
  26. 3a96ac4 acpi: Change API called to write the name for ACPI_DP_TYPE_CHILD by Harsha Priya · 8 years ago
  27. 20a588b arch/x86: provide common Intel ACPI hardware definitions by Aaron Durbin · 8 years ago
  28. 95c4344 arch/x86: provide common ACPI_Sx constants by Aaron Durbin · 8 years ago
  29. 5f8cb14 spike-riscv: Look for the CBFS in RAM by Jonathan Neuschäfer · 8 years ago
  30. 455c3c9 arch/riscv: Unconditionally start payloads in machine mode by Jonathan Neuschäfer · 8 years ago
  31. ffc9990 acpi: Change device properties to work as a tree by Duncan Laurie · 8 years ago
  32. 85d8027 acpigen_write_package: Return pointer to package element counter by Duncan Laurie · 8 years ago
  33. d02685b acpi_device: Have acpi_device_scope() use a separate buffer by Duncan Laurie · 8 years ago
  34. 5b6c28c gpio: Add support for translating gpio_t into ACPI pin by Duncan Laurie · 8 years ago
  35. 9d0cce2 riscv/bootblock.S: Register machine-mode, not supervisor-mode trap handler by Jonathan Neuschäfer · 8 years ago
  36. fefc77a arch/riscv: Show fault PC and load address on load access faults by Jonathan Neuschäfer · 8 years ago
  37. 719f9b5 arch/riscv: Move _start to the beginning of the bootblock by Jonathan Neuschäfer · 8 years ago
  38. e5f48d2 region: Add writeat and eraseat support by Antonello Dettori · 8 years ago
  39. c86da67 arch/x86/smbios: Correct manufacturer ID by Elyes HAOUAS · 8 years ago
  40. cf0e60f ACPI S3: Add common recovery code by Kyösti Mälkki · 8 years ago
  41. 8e627a2 ACPI S3: Fix prohibited wakeup by Kyösti Mälkki · 8 years ago
  42. d132c99 ACPI S3: Split support for HAVE_ACPI_RESUME by Kyösti Mälkki · 8 years ago
  43. a16cd9c ACPI S3: Move SMP trampoline recovery by Kyösti Mälkki · 8 years ago
  44. 65cc526 Ignore RAMTOP for MTRRs by Kyösti Mälkki · 8 years ago
  45. 7105660 riscv-spike: Move coreboot to 0x80000000 (2GiB) by Jonathan Neuschäfer · 8 years ago
  46. 072d436b ACPI S3: Cleanup RSDP reference by Kyösti Mälkki · 8 years ago
  47. 4307835 arch/x86/smbios: Add DRAM manufacturer by Patrick Rudolph · 8 years ago
  48. a969ed3 Move definitions of HIGH_MEMORY_SAVE by Kyösti Mälkki · 8 years ago
  49. bec853e Define RAMTOP for x86 only by Kyösti Mälkki · 8 years ago
  50. 1282b8d arch/riscv: Compile with -mcmodel=medany by Jonathan Neuschäfer · 8 years ago
  51. f934efc arch/riscv: Add misc.c to bootblock/romstage to get udelay() by Jonathan Neuschäfer · 8 years ago
  52. a9067c6 arch/riscv: copy read/write8/16/32 from x86 by Jonathan Neuschäfer · 8 years ago
  53. 4ac8240 arch/riscv/trap_util.S: Use "li" pseudo-instruction to load a constant by Jonathan Neuschäfer · 8 years ago
  54. 2030d25 arch/x86: Support "weak" BIST and timestamp save routines by Lee Leahy · 8 years ago
  55. d131ea3 arch/x86: Add debug spinloops in assembly_entry.S by Lee Leahy · 8 years ago
  56. fdc8c8b arch/x86: Add debug spinloop by Lee Leahy · 8 years ago
  57. 6735871 mainboard: Support ROM_SIZE > 16 MiB by Lee Leahy · 8 years ago
  58. 3892597 arch/x86: Enable SSE in bootblock_crt0.S by Lee Leahy · 8 years ago
  59. c5b758b SMBIOS: Implement SKU field by Kyösti Mälkki · 8 years ago
  60. 559e947 acpi_device: Add support for writing ACPI Device Properties by Duncan Laurie · 8 years ago
  61. 70c86d9 acpi_device: Add support for writing ACPI SPI descriptors by Duncan Laurie · 8 years ago
  62. 1010b4a acpi_device: Add support for writing ACPI I2C descriptors by Duncan Laurie · 8 years ago
  63. cfb6ea7 acpi_device: Add support for writing ACPI GPIO descriptors by Duncan Laurie · 8 years ago
  64. 6b7c1f6 acpi_device: Add support for writing ACPI Interrupt descriptors by Duncan Laurie · 8 years ago
  65. 10221a0 arch/x86: provide verstage support for CONFIG_C_ENVIRONMENT_BOOTBLOCK by Aaron Durbin · 8 years ago
  66. 2c51572 arm64: Add stack dump to exception handler by Julius Werner · 8 years ago
  67. d9af3ce device: Add an ACPI device name and path concept to devices by Duncan Laurie · 8 years ago
  68. 3829f23 acpigen: Add function to generate ToUUID() from a string by Duncan Laurie · 8 years ago
  69. 87c6097 arch/x86: Include timestamp.c in all stages by Alexandru Gagniuc · 8 years ago
  70. 0ba307f acpigen: Fix ?: operator confusion by Jonathan Neuschäfer · 8 years ago
  71. abe2de8 acpigen: Add functions to generate _STA() and _PRW() by Duncan Laurie · 8 years ago
  72. f7c3876 acpigen: Add an abstracted integer output method by Duncan Laurie · 8 years ago
  73. 56b69aa acpigen: Add helper functions for strings by Duncan Laurie · 8 years ago
  74. 9ccae75 acpigen: Add helpers for word/dword output by Duncan Laurie · 8 years ago
  75. 03f5072 arch/arm64: add FRAMEBUFFER region macros to memlayout by Lin Huang · 8 years ago
  76. 251ce85 smbios: Add SuperTalent SPD ID by Timothy Pearson · 8 years ago
  77. 0067a42 arch/armv7: Fix end index calculation in mmu_config_range_kb by Varadarajan Narayanan · 9 years ago
  78. fa5aba0 arch/x86: Drop CBFS_BASE_ADDRESS by Patrick Georgi · 8 years ago
  79. 5cc0ee27 build system: remove CBFSTOOL_PRE1_OPTS by Patrick Georgi · 8 years ago
  80. aef5865 arch/x86/assembly_entry: allow early post CAR stages to use common code by Aaron Durbin · 8 years ago
  81. 800b017 arch/x86/asembly_entry: reorder conditional stage entry macros by Aaron Durbin · 8 years ago
  82. a6e9051 lib/coreboot_table: use the architecture dependent table size by Aaron Durbin · 8 years ago
  83. a2118a2 arch: introduce architecture dependent common variables by Aaron Durbin · 8 years ago
  84. 4c76ab6 x86/memlayout.h: Do not include data/bss sections in C_ENVIRONMENT_BOOTBLOCK by Furquan Shaikh · 8 years ago
  85. a4db050 lib: add common write_tables() implementation by Aaron Durbin · 8 years ago
  86. 5481c96 lib/coreboot_table: add architecture hooks for adding tables by Aaron Durbin · 8 years ago
  87. d4afa93 lib/bootmem: allow architecture specific bootmem ranges by Aaron Durbin · 8 years ago
  88. dcee908 arch/x86: remove low coreboot table support by Aaron Durbin · 8 years ago
  89. 86cbfa0 arch/x86: clean up write_tables() by Aaron Durbin · 8 years ago
  90. 60eb2c2 arch: only print cbmem entries in one place by Aaron Durbin · 8 years ago
  91. a0546da arch: use Kconfig variable for coreboot table size by Aaron Durbin · 8 years ago
  92. 0eb1f1c arch/riscv/tables: remove confusion over write_tables() by Aaron Durbin · 8 years ago
  93. f7dca0a arch/power8/tables: remove confusion over write_tables() by Aaron Durbin · 8 years ago
  94. b3ee03c bootblock_crt0: Use CR* macros from cpu/x86/cr.h by Furquan Shaikh · 8 years ago
  95. 7bd886b Change la to li (load immediate) by Ronald G. Minnich · 8 years ago
  96. 6695901 arch/power8: Position bootblock start at reset vector by Timothy Pearson · 8 years ago
  97. 096f457 lib/prog_loading: introduce prog_segment_loaded() by Aaron Durbin · 8 years ago
  98. dd95e00 arch/x86: notify the system when the postcar parameter was updated by Aaron Durbin · 8 years ago
  99. 263522d armv7: Word-sized/half-word-sized memory operations for 32/16 bit read/write by Paul Kocialkowski · 9 years ago
  100. 7f8afe0 arch/x86: introduce postcar stage/phase by Aaron Durbin · 8 years ago