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review.coreboot.org / coreboot / 9631016660423d0585a1 / src / soc / intel / braswell / Kconfig
  1. d5855ec FSP1_1: Always use common code by Lee Leahy · 9 years ago
  2. 94b856e FSP 1.1: Move common FSP code by Lee Leahy · 9 years ago
  3. 3a54318 Add EM100 'hyper term' spi console support in ramstage & smm by Martin Roth · 9 years ago
  4. e73da80 braswell: Switch to using common ACPI _SWS code by Duncan Laurie · 9 years ago
  5. 3fda3c2 Move final Intel chipsets with ME to intel/common/firmware by Martin Roth · 9 years ago
  6. 3953e39 x86: bootblock: remove linking and program flow from build system by Aaron Durbin · 9 years ago
  7. 27fea06 soc/intel: Fix dependency of CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM by Alexandru Gagniuc · 9 years ago
  8. 1cb1c92 soc/intel/braswell/Kconfig: Remove ENABLE_MRC_CACHE Kconfig by Alexandru Gagniuc · 9 years ago
  9. 1244c2c intel/braswell: remove CBFS_SIZE option in SoC directory by Aaron Durbin · 9 years ago
  10. acb9c0b Braswell: Update to end of June. by Lee Leahy · 9 years ago
  11. df02c33 Kconfig: Fix references to obsolete symbols by Martin Roth · 9 years ago
  12. 3247172 Braswell: Add Braswell SOC support by Lee Leahy · 9 years ago
  13. c4dd3e0 Kconfig: Get rid of obsolete symbols by Martin Roth · 9 years ago
  14. 026e4dc Kconfig: Move CBFS_SIZE into Mainboard menu by Martin Roth · 9 years ago
  15. 44cbe10 smm: Merge configs SMM_MODULES and SMM_TSEG by Vladimir Serbinenko · 9 years ago
  16. 77ff0b1 Braswell: Use Baytrail as Comparison Base by Lee Leahy · 9 years ago