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review.coreboot.org / coreboot / 6aca7e6bec07c583de18752aa7a8639b64e9bd93 / src / northbridge / intel / sandybridge / Makefile.inc
  1. 6aca7e6 nb/intel/sandybridge: Move DMI init code by Patrick Rudolph · 5 years ago
  2. 772a154 nb/intel/snb: Drop NORTHBRIDGE_INTEL_IVYBRIDGE by Nico Huber · 5 years ago
  3. a6be58f nb/intel/sandybridge: Remove the C native graphic init by Arthur Heymans · 6 years ago
  4. ef8c559 nb/intel/sandybridge/report_platform: Move remaining code to sb folder by Patrick Rudolph · 6 years ago
  5. 74203de intel/sandybridge: Don't hardcode platform type by Patrick Rudolph · 7 years ago
  6. 6fcd7b8 cpu/intel/model_206ax: Switch to POSTCAR_STAGE by Arthur Heymans · 6 years ago
  7. 0b643d2 nb/intel/sandybridge/peg: Add PEG driver stub by Patrick Rudolph · 7 years ago
  8. 7539b8c nb/intel/sandybridge: Use common mrc cache functions by Arthur Heymans · 7 years ago
  9. b9959e2 cpu/intel/model_206ax: Use tsc monotonic timer by Patrick Rudolph · 7 years ago
  10. 305035c nb/intel/sandybridge/raminit: Separate Sandybridge and Ivybridge by Patrick Rudolph · 8 years ago
  11. fd5fa2a nb/intel/sandybridge/raminit: Split raminit.c by Patrick Rudolph · 8 years ago
  12. 92fc072 northbridge/intel: move mrccache.c of sandybridge + haswell to common by Alexander Couzens · 8 years ago
  13. 8e7928a sandybridge/gma_lvds: support both Sandy&Ivy on one board by Iru Cai · 9 years ago
  14. bd82d18 sandybridge: Always include MRC if not using native RAM init. by Vladimir Serbinenko · 8 years ago
  15. 144eea0 Make MRC vs native a config rather than making a separate chipset for it. by Vladimir Serbinenko · 8 years ago
  16. ffbb3c0 Merge sandy/ivybridge romstage flow for MRC and non-MRC. by Vladimir Serbinenko · 8 years ago
  17. bb9469c nb/intel/sandybridge: Enable basic IOMMU support by Nico Huber · 9 years ago
  18. a73b931 tree: drop last paragraph of GPL copyright header by Patrick Georgi · 9 years ago
  19. ecf2eb4 sandybridge ivybridge: Treat native init as first class citizen by Alexandru Gagniuc · 9 years ago
  20. 2c482a9 intel: Do not hardcode the position of mrc.cache by Alexandru Gagniuc · 9 years ago
  21. 6cb3a59 x86: flatten hierarchy by Stefan Reinauer · 9 years ago 4.1 4.1
  22. 5a2bd0b Revert "sandy/ivybridge: use LAPIC timer in SMM" by Patrick Georgi · 9 years ago
  23. a3aa8da sandy/ivybridge: use LAPIC timer in SMM by Stefan Reinauer · 9 years ago
  24. b890a12 Remove address from GPLv2 headers by Patrick Georgi · 9 years ago
  25. e1133b7 kbuild: automatically include northbridges by Stefan Reinauer · 9 years ago
  26. 72a8e5e Update hex values to CBFS binary name types in Makefiles by Martin Roth · 9 years ago
  27. c36af7b Replace includes of build.h with version.h by Kyösti Mälkki · 10 years ago
  28. 7d6b0af sandybridge: Kill CONFIG_HAVE_MRC_CACHE by Vladimir Serbinenko · 10 years ago
  29. fa1d688 sandy/ivy native: dedup romstage.c main() by Vladimir Serbinenko · 10 years ago
  30. 822bc65 ACPI: Remove CONFIG_GENERATE_ACPI_TABLES by Vladimir Serbinenko · 11 years ago
  31. 309fc4c sandybridge: Add native sandybridge by Vladimir Serbinenko · 10 years ago
  32. 9ba922f sandybridge: Native gfx init. by Vladimir Serbinenko · 10 years ago
  33. 1783a3c ivybridge: LVDS gfx init. by Vladimir Serbinenko · 10 years ago
  34. 7686a56 sandy/ivybridge: Native raminit. by Vladimir Serbinenko · 10 years ago
  35. 591031f sandy/ivy: Fix mrc.cache file in CBFS by Kyösti Mälkki · 10 years ago
  36. b92f5e8 nb/sandybridge: Move MRC cache above mrc.bin by Alexandru Gagniuc · 10 years ago
  37. cb08e16 CBMEM intel: Define get_top_of_ram() once per chipset by Kyösti Mälkki · 11 years ago
  38. 5e73be2 sandybridge: Allow skipping mrc.cache by Vladimir Serbinenko · 11 years ago
  39. 1cc3416 Add support to enable/disable builtin GbE (again) by Stefan Reinauer · 11 years ago
  40. 483ff82 sandybridge: Store MRC cache in CBFS by Patrick Georgi · 11 years ago
  41. a46a712 GPLv2 notice: Unify all files to just use one space in »MA 02110-1301« by Paul Menzel · 11 years ago
  42. e135ac5 Remove AMD special case for LAPIC based udelay() by Patrick Georgi · 12 years ago
  43. 23f38cd Get rid of drivers class by Patrick Georgi · 12 years ago
  44. e5a0a5d Initial IGD OpRegion implementation by Stefan Reinauer · 12 years ago
  45. 1244f4b Rework Sandybridge MRC cache handling by Stefan Reinauer · 12 years ago
  46. cafedcf Strip quotes from Sandybridge MRC blob by Stefan Reinauer · 12 years ago
  47. 7a3f36a Sandybridge: Display platform information early by Vadim Bendebury · 12 years ago
  48. 16401b8 SMM: Add udelay on Sandybridge systems by Stefan Reinauer · 12 years ago
  49. 00636b0 Add support for Intel Sandybridge CPU (northbridge part) by Stefan Reinauer · 12 years ago