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coreboot
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6446626c1e575bf77a795f92ceead167e731990c
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src
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northbridge
6446626
Use new system agent binaries
by Stefan Reinauer
· 12 years ago
c533463
VIA chipsets: fix compilation without real mode code
by Stefan Reinauer
· 12 years ago
313ec9d
Sandybridge: Set PEG clock gating
by Marc Jones
· 12 years ago
7e8c8e9
Add PCIe init and NMode flag to PEI data structure
by Stefan Reinauer
· 12 years ago
e8179b5
Add ddr3lv_support flag to pei_data structure
by Duncan Laurie
· 12 years ago
53508fe
pei_data.h: Fix comment
by Marc Jones
· 12 years ago
48a4a7f
Provide MRC with a console printing callback function
by Vadim Bendebury
· 12 years ago
e5a0a5d
Initial IGD OpRegion implementation
by Stefan Reinauer
· 12 years ago
ad67791
Avoid using hardcoded values in MRC cache code
by Vadim Bendebury
· 12 years ago
a1ea822
Make coreboot use the offset parameter in cbfstool create
by Stefan Reinauer
· 12 years ago
4c8027a
Make register/value lists const
by Stefan Reinauer
· 12 years ago
357bb2d
SandyBridge/IvyBridge: Use flash map to find MRC cache
by Stefan Reinauer
· 12 years ago
c6b9f92
Add missing newline in error message
by Stefan Reinauer
· 12 years ago
becacec
AMD G34 CPU: change lapic_id in northbridge.c to accommodate G34 CPU
by Siyuan Wang
· 12 years ago
cf81b82
CMOS: Move MRC seed offset into upper bank
by Duncan Laurie
· 12 years ago
6f05c2eb
AMD rd890 late.c: Don't enable PCIe ports after PCIe init.
by Siyuan Wang
· 12 years ago
fa678bb
AMD agesa family15: PCI domain should scan bus from 0x18.0
by Siyuan Wang
· 12 years ago
1e0ddf6
Fix some issues with new "reference" toolchain
by Stefan Reinauer
· 12 years ago
3e9155d
northbridge/sch: move the \n so it reads a little better
by Sebastian Andrzej Siewior
· 12 years ago
59e3e02
northbridge/sch: read the size of main memory from the proper register
by Sebastian Andrzej Siewior
· 12 years ago
50dd47b
northbridge/sch: Read the GPU memory from the correct PCI device
by Sebastian Andrzej Siewior
· 12 years ago
66fa9e2
northbridge/sch: don't overwrite hightables with GPU / TSEG memory
by Sebastian Andrzej Siewior
· 12 years ago
9aeb694
hpet: common ACPI generation
by Patrick Georgi
· 12 years ago
0279036
Remove chip.h files without config structure
by Kyösti Mälkki
· 12 years ago
72cee54
HAVE_HIGH_TABLES is gone
by Patrick Georgi
· 12 years ago
128c7d7
agesa fam15 northbridge: change lapic_id to accommodate two CPUs
by Siyuan Wang
· 12 years ago
87213b6
Fix AMD UMA for RS780
by Kyösti Mälkki
· 12 years ago
c33f1e9
AMD northbridges: factor out CPU allocation
by Kyösti Mälkki
· 12 years ago
cd9fc1a
AMD northbridges: rewrite CPU allocation
by Kyösti Mälkki
· 12 years ago
fee73df
Auto-declare chip_operations
by Kyösti Mälkki
· 12 years ago
dbc4739
AMD northbridge: copy TOP_MEM and TOP_MEM2 for distribution
by Kyösti Mälkki
· 12 years ago
7874e9d
Sandybridge: Fix integer overrun in romstage udelay()
by Stefan Reinauer
· 12 years ago
cf8e466
Cleanup coreboot memory table includes
by Kyösti Mälkki
· 12 years ago
7bdf85b
Move cpus_ready_for_init() to AMD K8
by Kyösti Mälkki
· 12 years ago
9ca1c0a
Sandy/Ivy Bridge and Cougar/Panther Point: Fix names
by Stefan Reinauer
· 12 years ago
ffb6bdd
AMD f15: Change multiply ONE_MB to bit shifting (Propagation)
by zbao
· 12 years ago
15dc3cc
AMD f15 nb: Remove the misleading 0x100 from the limitk (Propagation)
by zbao
· 12 years ago
49bb26a4
AMD NB: Limit the device field to 5 bits. (Propagation)
by zbao
· 12 years ago
d462736
Limit the device field to 5 bits.
by zbao
· 12 years ago
6b5eb1c
AMD and GFXUMA: move setup_uma_memory() to northbridge
by Kyösti Mälkki
· 12 years ago
30f0464
AMD Agesa and GFXUMA: drop use of uma_memory_base
by Kyösti Mälkki
· 12 years ago
f803ac4
AMD K8 and AMDFAM10, GFXUMA: drop use of uma_memory_base
by Kyösti Mälkki
· 12 years ago
9fd183e
AMD F15tn northbridge: Remove the misleading 0x100 from the limitk.
by zbao
· 12 years ago
5e29f00
Intel and GFXUMA: drop redundant use of lb_add_memory_range()
by Kyösti Mälkki
· 12 years ago
7f189cc
Intel Sandybridge and UMA: use mmio_resource()
by Kyösti Mälkki
· 12 years ago
1ec5e74
Intel Sandybridge: add reserved memory as resources
by Kyösti Mälkki
· 12 years ago
d4ee808
sandybridge: reinitialize usbdebug after MRC
by Sven Schnelle
· 12 years ago
6ff1d36
Intel and GFXUMA: fix MTRR and use uma_resource()
by Kyösti Mälkki
· 12 years ago
08ef498
Intel 82810 and 82830: always room for PCI memory
by Kyösti Mälkki
· 12 years ago
b5f5652
Intel i945 and sch: no memory over 4GB
by Kyösti Mälkki
· 12 years ago
efff733
Refactor driver structs
by Patrick Georgi
· 12 years ago
7dc2864
amd/lx: Move configuration from source to Kconfig
by Patrick Georgi
· 12 years ago
1b3207e
CTDP: Only do TDP down/nominal change from TNP0
by Duncan Laurie
· 12 years ago
55864ef
ACPI: Add support for runtime config TDP down
by Duncan Laurie
· 12 years ago
405cfe2
Change multiply ONE_MB to bit shifting.
by zbao
· 12 years ago
d59d624
sync the northbridge.c with other family.
by zbao
· 12 years ago
f4d3623
ELOG: Add support for a monotonic boot counter in CMOS
by Duncan Laurie
· 12 years ago
696262b
More descriptive error messages in Sandybridge raminit code
by Stefan Reinauer
· 12 years ago
9c4c6ab
ELOG: Fix boot count increment for non-wake case
by Duncan Laurie
· 12 years ago
fe7b5d2
Ivybridge: fix workaround and enable PAIR
by Duncan Laurie
· 12 years ago
77dbbac
CPU: Add basic support for Nominal Configurable TDP
by Duncan Laurie
· 12 years ago
b91a0f2
Rename cache_lbmem() to cache_ramstage()
by Stefan Reinauer
· 12 years ago
6097e19
Make ACPI code detect Sandy/Ivy Bridge dynamically
by Stefan Reinauer
· 12 years ago
afcaac2
Drop (empty) sandybridge_late_initialization()
by Stefan Reinauer
· 12 years ago
baae2d2
Add support for HM70 and NM70 LPC bridge
by Stefan Reinauer
· 12 years ago
542e962
Print PCI ID of PCH during boot up
by Stefan Reinauer
· 12 years ago
c664387
Drop leading spaces from CPU name string
by Stefan Reinauer
· 12 years ago
4821489
Fix MRC cache update delays
by Stefan Reinauer
· 12 years ago
496f4a0
SandyBridge: Add another PCI device ID for northbridge
by Walter Murphy
· 12 years ago
da83a5f
Fixes to enable RC6 on IvyBridge
by Duncan Laurie
· 12 years ago
ce6e9fe
i945: Disable IGD if plugin VGA is preferred
by Patrick Georgi
· 12 years ago
6db7f34
Trinity wrapper code improvement.
by zbao
· 12 years ago
8bacc40
Fix udelay() implementation for i945 romstage
by Nico Huber
· 12 years ago
bcdbe90
Drop VGA_BRIDGE_SETUP config option
by Patrick Georgi
· 12 years ago
cda9f93
Intel SCH northbridge: fix resource index
by Kyösti Mälkki
· 12 years ago
1171986
Drop invalid device ops on Agesa northbridge
by Kyösti Mälkki
· 12 years ago
de3dde4
AMD: Fix GFXUMA with 4GB or more RAM
by Kyösti Mälkki
· 12 years ago
ba589e3
Move setup_uma_memory() to K8 northbridge
by Kyösti Mälkki
· 12 years ago
231f261
Move setup_uma_memory() to AMDFAM10 northbridge
by Kyösti Mälkki
· 12 years ago
55fff930
Move setup_uma_memory() to Agesa Family14 northbridge
by Kyösti Mälkki
· 12 years ago
d4821fc
Move setup_uma_memory() to Agesa Family12 northbridge
by Kyösti Mälkki
· 12 years ago
03548aa
Move setup_uma_memory() to Agesa Family15 northbridge
by Kyösti Mälkki
· 12 years ago
cc55b9b
Define global uma_memory variables
by Kyösti Mälkki
· 12 years ago
63f8c08
Add global uma_resource()
by Kyösti Mälkki
· 12 years ago
d422069
i5000: Fix resource allocation
by Sven Schnelle
· 12 years ago
34d86f0
i5000: reset system if raminit fails
by Sven Schnelle
· 12 years ago
7b48379
i5000: Add PCI ids for all i5000 flavours
by Sven Schnelle
· 12 years ago
6444bd4
i945: Reset IGD on boot
by Patrick Georgi
· 12 years ago
2c08f6a
AGESA F15 wrapper for Trinity
by zbao
· 12 years ago
904a0ec
Don't use 64-bit constant 0x100000000 in linker scripts
by Nico Huber
· 12 years ago
1454685
i5000: fix another typo
by Sven Schnelle
· 12 years ago
39b47d2
i5000: fix typos
by Sven Schnelle
· 12 years ago
1a7a7e6
i5000: enforce hard reset
by Sven Schnelle
· 12 years ago
88fc0b9
Sandybridge: Remove remnants of FDT support from MRC cache code
by Stefan Reinauer
· 12 years ago
6e901fd
Sandybridge: Fix MRC cache calculation
by Stefan Reinauer
· 12 years ago
2f00ce3
cbtypes.h: Unify cbtypes.h used in AMD board's code
by Vikram Narayanan
· 12 years ago
bb11e60
Hook up MRC cache update
by Stefan Reinauer
· 12 years ago
1244f4b
Rework Sandybridge MRC cache handling
by Stefan Reinauer
· 12 years ago
f8f0062
Some more #if cleanup
by Patrick Georgi
· 12 years ago
e166782
Clean up #ifs
by Patrick Georgi
· 12 years ago
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