1. 6446626 Use new system agent binaries by Stefan Reinauer · 10 years ago
  2. c533463 VIA chipsets: fix compilation without real mode code by Stefan Reinauer · 10 years ago
  3. 313ec9d Sandybridge: Set PEG clock gating by Marc Jones · 10 years ago
  4. 7e8c8e9 Add PCIe init and NMode flag to PEI data structure by Stefan Reinauer · 10 years ago
  5. e8179b5 Add ddr3lv_support flag to pei_data structure by Duncan Laurie · 11 years ago
  6. 53508fe pei_data.h: Fix comment by Marc Jones · 11 years ago
  7. 48a4a7f Provide MRC with a console printing callback function by Vadim Bendebury · 11 years ago
  8. e5a0a5d Initial IGD OpRegion implementation by Stefan Reinauer · 10 years ago
  9. ad67791 Avoid using hardcoded values in MRC cache code by Vadim Bendebury · 10 years ago
  10. a1ea822 Make coreboot use the offset parameter in cbfstool create by Stefan Reinauer · 10 years ago
  11. 4c8027a Make register/value lists const by Stefan Reinauer · 10 years ago
  12. 357bb2d SandyBridge/IvyBridge: Use flash map to find MRC cache by Stefan Reinauer · 10 years ago
  13. c6b9f92 Add missing newline in error message by Stefan Reinauer · 10 years ago
  14. becacec AMD G34 CPU: change lapic_id in northbridge.c to accommodate G34 CPU by Siyuan Wang · 10 years ago
  15. cf81b82 CMOS: Move MRC seed offset into upper bank by Duncan Laurie · 10 years ago
  16. 6f05c2eb AMD rd890 late.c: Don't enable PCIe ports after PCIe init. by Siyuan Wang · 10 years ago
  17. fa678bb AMD agesa family15: PCI domain should scan bus from 0x18.0 by Siyuan Wang · 10 years ago
  18. 1e0ddf6 Fix some issues with new "reference" toolchain by Stefan Reinauer · 10 years ago
  19. 3e9155d northbridge/sch: move the \n so it reads a little better by Sebastian Andrzej Siewior · 10 years ago
  20. 59e3e02 northbridge/sch: read the size of main memory from the proper register by Sebastian Andrzej Siewior · 10 years ago
  21. 50dd47b northbridge/sch: Read the GPU memory from the correct PCI device by Sebastian Andrzej Siewior · 10 years ago
  22. 66fa9e2 northbridge/sch: don't overwrite hightables with GPU / TSEG memory by Sebastian Andrzej Siewior · 10 years ago
  23. 9aeb694 hpet: common ACPI generation by Patrick Georgi · 10 years ago
  24. 0279036 Remove chip.h files without config structure by Kyösti Mälkki · 10 years ago
  25. 72cee54 HAVE_HIGH_TABLES is gone by Patrick Georgi · 10 years ago
  26. 128c7d7 agesa fam15 northbridge: change lapic_id to accommodate two CPUs by Siyuan Wang · 10 years ago
  27. 87213b6 Fix AMD UMA for RS780 by Kyösti Mälkki · 10 years ago
  28. c33f1e9 AMD northbridges: factor out CPU allocation by Kyösti Mälkki · 10 years ago
  29. cd9fc1a AMD northbridges: rewrite CPU allocation by Kyösti Mälkki · 11 years ago
  30. fee73df Auto-declare chip_operations by Kyösti Mälkki · 10 years ago
  31. dbc4739 AMD northbridge: copy TOP_MEM and TOP_MEM2 for distribution by Kyösti Mälkki · 10 years ago
  32. 7874e9d Sandybridge: Fix integer overrun in romstage udelay() by Stefan Reinauer · 11 years ago
  33. cf8e466 Cleanup coreboot memory table includes by Kyösti Mälkki · 10 years ago
  34. 7bdf85b Move cpus_ready_for_init() to AMD K8 by Kyösti Mälkki · 11 years ago
  35. 9ca1c0a Sandy/Ivy Bridge and Cougar/Panther Point: Fix names by Stefan Reinauer · 11 years ago
  36. ffb6bdd AMD f15: Change multiply ONE_MB to bit shifting (Propagation) by zbao · 10 years ago
  37. 15dc3cc AMD f15 nb: Remove the misleading 0x100 from the limitk (Propagation) by zbao · 10 years ago
  38. 49bb26a4 AMD NB: Limit the device field to 5 bits. (Propagation) by zbao · 10 years ago
  39. d462736 Limit the device field to 5 bits. by zbao · 11 years ago
  40. 6b5eb1c AMD and GFXUMA: move setup_uma_memory() to northbridge by Kyösti Mälkki · 11 years ago
  41. 30f0464 AMD Agesa and GFXUMA: drop use of uma_memory_base by Kyösti Mälkki · 11 years ago
  42. f803ac4 AMD K8 and AMDFAM10, GFXUMA: drop use of uma_memory_base by Kyösti Mälkki · 11 years ago
  43. 9fd183e AMD F15tn northbridge: Remove the misleading 0x100 from the limitk. by zbao · 10 years ago
  44. 5e29f00 Intel and GFXUMA: drop redundant use of lb_add_memory_range() by Kyösti Mälkki · 11 years ago
  45. 7f189cc Intel Sandybridge and UMA: use mmio_resource() by Kyösti Mälkki · 11 years ago
  46. 1ec5e74 Intel Sandybridge: add reserved memory as resources by Kyösti Mälkki · 11 years ago
  47. d4ee808 sandybridge: reinitialize usbdebug after MRC by Sven Schnelle · 11 years ago
  48. 6ff1d36 Intel and GFXUMA: fix MTRR and use uma_resource() by Kyösti Mälkki · 11 years ago
  49. 08ef498 Intel 82810 and 82830: always room for PCI memory by Kyösti Mälkki · 11 years ago
  50. b5f5652 Intel i945 and sch: no memory over 4GB by Kyösti Mälkki · 11 years ago
  51. efff733 Refactor driver structs by Patrick Georgi · 11 years ago
  52. 7dc2864 amd/lx: Move configuration from source to Kconfig by Patrick Georgi · 11 years ago
  53. 1b3207e CTDP: Only do TDP down/nominal change from TNP0 by Duncan Laurie · 11 years ago
  54. 55864ef ACPI: Add support for runtime config TDP down by Duncan Laurie · 11 years ago
  55. 405cfe2 Change multiply ONE_MB to bit shifting. by zbao · 11 years ago
  56. d59d624 sync the northbridge.c with other family. by zbao · 11 years ago
  57. f4d3623 ELOG: Add support for a monotonic boot counter in CMOS by Duncan Laurie · 11 years ago
  58. 696262b More descriptive error messages in Sandybridge raminit code by Stefan Reinauer · 11 years ago
  59. 9c4c6ab ELOG: Fix boot count increment for non-wake case by Duncan Laurie · 11 years ago
  60. fe7b5d2 Ivybridge: fix workaround and enable PAIR by Duncan Laurie · 11 years ago
  61. 77dbbac CPU: Add basic support for Nominal Configurable TDP by Duncan Laurie · 11 years ago
  62. b91a0f2 Rename cache_lbmem() to cache_ramstage() by Stefan Reinauer · 11 years ago
  63. 6097e19 Make ACPI code detect Sandy/Ivy Bridge dynamically by Stefan Reinauer · 11 years ago
  64. afcaac2 Drop (empty) sandybridge_late_initialization() by Stefan Reinauer · 11 years ago
  65. baae2d2 Add support for HM70 and NM70 LPC bridge by Stefan Reinauer · 11 years ago
  66. 542e962 Print PCI ID of PCH during boot up by Stefan Reinauer · 11 years ago
  67. c664387 Drop leading spaces from CPU name string by Stefan Reinauer · 11 years ago
  68. 4821489 Fix MRC cache update delays by Stefan Reinauer · 11 years ago
  69. 496f4a0 SandyBridge: Add another PCI device ID for northbridge by Walter Murphy · 11 years ago
  70. da83a5f Fixes to enable RC6 on IvyBridge by Duncan Laurie · 11 years ago
  71. ce6e9fe i945: Disable IGD if plugin VGA is preferred by Patrick Georgi · 11 years ago
  72. 6db7f34 Trinity wrapper code improvement. by zbao · 11 years ago
  73. 8bacc40 Fix udelay() implementation for i945 romstage by Nico Huber · 11 years ago
  74. bcdbe90 Drop VGA_BRIDGE_SETUP config option by Patrick Georgi · 11 years ago
  75. cda9f93 Intel SCH northbridge: fix resource index by Kyösti Mälkki · 11 years ago
  76. 1171986 Drop invalid device ops on Agesa northbridge by Kyösti Mälkki · 11 years ago
  77. de3dde4 AMD: Fix GFXUMA with 4GB or more RAM by Kyösti Mälkki · 11 years ago
  78. ba589e3 Move setup_uma_memory() to K8 northbridge by Kyösti Mälkki · 11 years ago
  79. 231f261 Move setup_uma_memory() to AMDFAM10 northbridge by Kyösti Mälkki · 11 years ago
  80. 55fff930 Move setup_uma_memory() to Agesa Family14 northbridge by Kyösti Mälkki · 11 years ago
  81. d4821fc Move setup_uma_memory() to Agesa Family12 northbridge by Kyösti Mälkki · 11 years ago
  82. 03548aa Move setup_uma_memory() to Agesa Family15 northbridge by Kyösti Mälkki · 11 years ago
  83. cc55b9b Define global uma_memory variables by Kyösti Mälkki · 11 years ago
  84. 63f8c08 Add global uma_resource() by Kyösti Mälkki · 11 years ago
  85. d422069 i5000: Fix resource allocation by Sven Schnelle · 11 years ago
  86. 34d86f0 i5000: reset system if raminit fails by Sven Schnelle · 11 years ago
  87. 7b48379 i5000: Add PCI ids for all i5000 flavours by Sven Schnelle · 11 years ago
  88. 6444bd4 i945: Reset IGD on boot by Patrick Georgi · 11 years ago
  89. 2c08f6a AGESA F15 wrapper for Trinity by zbao · 11 years ago
  90. 904a0ec Don't use 64-bit constant 0x100000000 in linker scripts by Nico Huber · 11 years ago
  91. 1454685 i5000: fix another typo by Sven Schnelle · 11 years ago
  92. 39b47d2 i5000: fix typos by Sven Schnelle · 11 years ago
  93. 1a7a7e6 i5000: enforce hard reset by Sven Schnelle · 11 years ago
  94. 88fc0b9 Sandybridge: Remove remnants of FDT support from MRC cache code by Stefan Reinauer · 11 years ago
  95. 6e901fd Sandybridge: Fix MRC cache calculation by Stefan Reinauer · 11 years ago
  96. 2f00ce3 cbtypes.h: Unify cbtypes.h used in AMD board's code by Vikram Narayanan · 11 years ago
  97. bb11e60 Hook up MRC cache update by Stefan Reinauer · 11 years ago
  98. 1244f4b Rework Sandybridge MRC cache handling by Stefan Reinauer · 11 years ago
  99. f8f0062 Some more #if cleanup by Patrick Georgi · 11 years ago
  100. e166782 Clean up #ifs by Patrick Georgi · 11 years ago