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review.coreboot.org / coreboot / 486240fc7d2f1f8fc5bac2614d5f4139ab8d4ea3 / src / mainboard / emulation / spike-riscv / uart.c
  1. 486240f src/mainboard: Remove unnecessary space after casts by Elyes Haouas · 1 year, 9 months ago
  2. e3a1247 include/console/uart: make index parameter unsigned by Felix Held · 4 years ago
  3. 6b5bc77 treewide: Remove "this file is part of" lines by Patrick Georgi · 4 years, 3 months ago
  4. 585495e mainboard/emulation: Use SPDX for GPL-2.0-only files by Angel Pons · 4 years, 5 months ago
  5. 3b618bb mainboard/[a-f]*: Remove copyright notices by Patrick Georgi · 4 years, 5 months ago
  6. 0edf6a5 src: Use 'include <boot/coreboot_tables.h>' when appropriate by Elyes HAOUAS · 4 years, 10 months ago
  7. 065857e arch/io.h: Drop unnecessary include by Kyösti Mälkki · 5 years ago
  8. 035cf71 mb/emulation/spike-riscv: Update UART address by Jonathan Neuschäfer · 7 years ago
  9. 99f2f11 riscv: Unify SBI call implementations under arch/riscv/ by Jonathan Neuschäfer · 8 years ago
  10. d15e9aa riscv-spike: Replace custom UART with a memory-mapped 8250 by Jonathan Neuschäfer · 8 years ago
  11. a73b931 tree: drop last paragraph of GPL copyright header by Patrick Georgi · 9 years ago
  12. 8fad21d riscv-spike: support for Spike emulation of riscv by Thaminda Edirisooriya · 9 years ago