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review.coreboot.org / coreboot / 44a48ce7a46c36df69f7b2cf3552bf10fa5f61b6 / src / soc / intel / cannonlake / Kconfig
  1. c8db633 soc/intel/cannonlake/Kconfig: Don't have all variants select SOC_INTEL_CANNONLAKE by Arthur Heymans · 5 years ago
  2. 4821a0e soc/intel/cannonlake: Rename SOC_INTEL_COMMON_CANNONLAKE_BASE by Arthur Heymans · 5 years ago
  3. a0368a0 soc/intel/{cml, whl}: Add option to skip HECI disable in SMM by Subrata Banik · 5 years ago
  4. 9995418 soc/intel: Replace UART_BASE() and friends with a Kconfig by Nico Huber · 5 years ago
  5. d5d89c8 soc/intel/cannonlake: Fix pcie clock number by Lijian Zhao · 5 years ago
  6. 939440c soc/intel/cannonlake: Add GPIO dual-route support. by Tim Wawrzynczak · 5 years ago
  7. 6672bd8 vboot: refactor OPROM code by Joel Kitching · 5 years ago
  8. 73b0136 3rdparty/fsp: Update submodule pointer to upstream master by Matt DeVillier · 5 years ago
  9. 3717256 soc/intel/cannonlake: Enable PlatformDebugConsent by Kconfig by Kane Chen · 5 years ago
  10. 7f1a0e6 Revert "soc/intel/cannonlake: Enable coreboot MP PPI service for WHL/CML" by Lijian Zhao · 5 years ago
  11. a432f38 soc/intel/cannonlake: Implement soc side VMX support by Ronak Kanabar · 5 years ago
  12. 41dad28 soc/intel/cannonlake: Enable coreboot MP PPI service for WHL/CML by Subrata Banik · 5 years ago
  13. cef9879 soc/intel/cannonlake: Select FSP_M_XIP by Furquan Shaikh · 5 years ago
  14. 09b01de soc/intel/cannonlake: Do not use XIP_ROM_SIZE by Furquan Shaikh · 5 years ago
  15. fa011db soc/intel/cannonlake: Add CometLake SoC support by Subrata Banik · 5 years ago
  16. 8aadab7 soc/intel/cannonlake: Add a config for configuring SD_VDD1_PWR_EN# by Rizwan Qureshi · 5 years ago
  17. 6527b1a soc/intel/cannonlake: Add Whiskeylake SoC kconfig by Subrata Banik · 5 years ago
  18. cff6a1d soc/intel/cannonlake: Remove SOC_INTEL_CANNONLAKE_MEMCFG_INIT Kconfig by Subrata Banik · 5 years ago
  19. f9154c5 soc/intel/cannonlake: Hook up Microcode by Lijian Zhao · 6 years ago
  20. f5ca922 Untangle CBFS microcode updates by Nico Huber · 6 years ago
  21. a96e66a soc/intel: Clean mess around UART_DEBUG by Nico Huber · 6 years ago
  22. 695f2fe soc/intel/cannonlake: Fix I2C clock input by Duncan Laurie · 6 years ago
  23. 11340e5 soc/intel/cannonlake: Increase bootblock size by Duncan Laurie · 6 years ago
  24. c6382cd soc/intel/*: Make FSP header path user configurable by Patrick Georgi · 6 years ago
  25. b66757f soc/intel: Consolidate FSP CAR setup and teardown code by Praveen hodagatta pranesh · 6 years ago
  26. f677d17 intel: Use CF9 reset (part 2) by Patrick Rudolph · 6 years ago
  27. dc4fceb soc/intel/cannonlake: Enable HDA driver support by praveen hodagatta pranesh · 6 years ago
  28. 521e48c soc/intel/cannonlake: Add CNP PCH-H gpio pin definitions by praveen hodagatta pranesh · 6 years ago
  29. e26c4a4 soc/intel/cannonlake: Add new cannon lake PCH-H support by praveen hodagatta pranesh · 6 years ago
  30. 6539e10 drivers/intel/fsp2_0: Hook up IntelFSP repo by Patrick Georgi · 6 years ago
  31. 2912e8e soc/intel/denverton_ns: Enable common block PMC by Julien Viard de Galbert · 6 years ago
  32. ef8b957 src/*/intel/: clarify Kconfig options regarding IFD by Stefan Tauner · 6 years ago
  33. b2e56c1 soc/intel/cannonlake: Correct number of root ports for CNL PCH H by Maulik V Vaghela · 6 years ago
  34. 903c976 soc/intel/cannonlake: Change LPDDR4 to MEMCFG by Lijian Zhao · 6 years ago
  35. 3638a52 soc/intel/coffeelake: Add initial coffeelake support by Lijian Zhao · 6 years ago
  36. 918ff85 soc/intel/cannonlake: Disable UART_DEBUG by default by Subrata Banik · 6 years ago
  37. 29cc331 drivers/intel/gma: Unify VBT related Kconfig names by Nico Huber · 6 years ago
  38. 730df3c arch/x86: Make RELOCATABLE_RAMSTAGE the default by Kyösti Mälkki · 8 years ago
  39. c4986eb soc/intel/common/block: Add common chip config block by Subrata Banik · 6 years ago
  40. f513ceb soc/intel/{cannonlake, skylake}: Select Gen-6 PCH binding for SKL/CNL by Subrata Banik · 6 years ago
  41. e462585 soc/intel/cannonlake: Enable IDT and expection handling support for all stages by Aamir Bohra · 6 years ago
  42. 98376b8 soc/intel/cannonlake: Select common XHCI code by Subrata Banik · 6 years ago
  43. 160fbe5 soc/intel/cannonlake: Reduce STACK_SIZE to 4KiB by Subrata Banik · 6 years ago
  44. e66600e soc/intel/cannonlake: Add CONFIG_SMM_RESERVED_SIZE config by Subrata Banik · 6 years ago
  45. dc23396 soc/intel/cannonlake: Include stage cache support for CNL by Subrata Banik · 6 years ago
  46. c0257dd ifdtool: Add a list of known platforms that support IFD_VERSION_2 by Furquan Shaikh · 6 years ago
  47. e09ba47 soc/intel/cannonlake: Set Cannonlake I2C clock by Lijian Zhao · 6 years ago
  48. 551e4be soc/intel/common: prepare for lpss clock split by Aaron Durbin · 6 years ago
  49. 2410cd9 soc/intel/cannonlake: Limit xDCI feature when VBOOT is enabled by Duncan Laurie · 6 years ago
  50. ac1cd44 soc/intel/cannonlake: Select SOC_AHCI_PORT_IMPLEMENTED_INVERT Kconfig for CNP-PCH by Subrata Banik · 6 years ago
  51. 7492bcb soc/intel/cannonlake: Increase heap size by John Zhao · 6 years ago
  52. a8733e3 soc/intel/cannonlake: CannonaLake make use of FVI information by Subrata Banik · 6 years ago
  53. 7455881 drivers/intel/fsp2_0: Unbind UDK2015 Kconfig from FSP2.0 driver by Subrata Banik · 6 years ago
  54. 4a1ee4b mainboard/intel/cannonlake_rvp: Add support for MAX98373 speaker amp by N, Harshapriya · 7 years ago
  55. 0e956f2 soc/intel/cannonlake: Add audio NHLT support by Lijian Zhao · 7 years ago
  56. 9e3ba21 soc/intel/cannonlake: Add option to select FSP_CAR by Subrata Banik · 7 years ago
  57. 780a1c4 soc/intel/cannonlake: provide LPDDR4 memory init by Nick Vaccaro · 7 years ago
  58. 031020e soc/intel/cannonlake: Correct PMC/GPIO routing information by Lijian Zhao · 7 years ago
  59. a5bb716 soc/intel/cannonlake: Select SOC_INTEL_COMMON_BLOCK_GSPI_VERSION_2 by Furquan Shaikh · 7 years ago
  60. b8dc63b ic2/designware: Move Intel i2c logic to shared driver by Chris Ching · 7 years ago
  61. 2b96f42 soc/intel/common/fast_spi: implement spi_flash_ctrlr_protect_region() by Aaron Durbin · 7 years ago
  62. 75c6f4a soc/intel/cannonlake: Make use of Intel common Graphics block by Subrata Banik · 7 years ago
  63. f388561 soc/intel/cannonlake: Define default LPSS clock by Lijian Zhao · 7 years ago
  64. 5a283ef soc/intel/cannonlake: Make use of Intel SPI common block by Subrata Banik · 7 years ago
  65. 7b2d1ae soc/intel/cannonlake: Add DSP support by Lijian Zhao · 7 years ago
  66. 9bb684a soc/intel/cannonlake: Install common i2c by Lijian Zhao · 7 years ago
  67. d2c6365 soc/intel/cannonlake: Use SCS common code by Bora Guvendik · 7 years ago
  68. 899f5ff soc/intel/cannonlake: Use common p2sb driver by Lijian Zhao · 7 years ago
  69. 9b6384c soc/intel/cannonlake: Increase stack size from 4KiB to 8KiB by John Zhao · 7 years ago
  70. c85890d soc/intel/cannonlake: Change max root port to 16 by Lijian Zhao · 7 years ago
  71. b0c4cbb soc/intel/cannonlake: Add IGD Support and pre-OS display code by Abhay Kumar · 7 years ago
  72. 47569cf soc/intel/cannonlake: Use EBDA area to store cbmem_top address by Subrata Banik · 7 years ago
  73. 0c8237a soc/intel/cannonlake: Change default UART number to 2 by Lijian Zhao · 7 years ago
  74. a06f55b soc/intel/cannonlake: Enable MRC cache by Lijian Zhao · 7 years ago
  75. 4a8f45f soc/intel/cannonlake: reduce bootblock size by Aaron Durbin · 7 years ago
  76. f0eb999 soc/intel/cannonlake: Fill the SMI usage by Lijian Zhao · 7 years ago
  77. a515849 soc/intel/cannonlake: Add lpc pci driver by Lijian Zhao · 7 years ago
  78. fcf8820 soc/intel/cannonlake: Add FSP GOP support by Abhay kumar · 7 years ago
  79. 2b074d9 soc/intel/cannonlake: Add common ACPI support for CNL by Lijian Zhao · 7 years ago
  80. 6d7063c soc/intel/cannonlake: Add Vboot/ChromeOS support by Lijian Zhao · 7 years ago
  81. c8c741d soc/intel/cannonlake: Define Max PCIE Root Ports by Pratik Prajapati · 7 years ago
  82. 69b5cdb soc/intel/cannonlake: add gpio files to make by Nick Vaccaro · 7 years ago
  83. d37ebdd soc/intel/canonlake: Enable LPSS UART in 32bit PCI mode by Lijian Zhao · 7 years ago
  84. b045d4c soc/intel/{cannonlake,skylake}: Add active default value for UART_FOR_CONSOLE by Subrata Banik · 7 years ago
  85. 9027e1b soc/intel/cannonlake: Init UPD params based on config by Pratik Prajapati · 7 years ago
  86. 01eda28 soc/intel/cannonlake: Add cpu.c and MP init support by Pratik Prajapati · 7 years ago
  87. b3dfcb8 soc/intel/cannonlake: Enable common PMC code for CNL by Lijian Zhao · 7 years ago
  88. ce4c9ec soc/intel/cannonlake: Add Kconfig option to select UART index by Subrata Banik · 7 years ago
  89. 3211117 soc/intel/cannonlake: Add SPI flash controller driver by Lijian Zhao · 7 years ago
  90. 8465a81 soc/intel/cannonlake: Add postcar stage support by Lijian Zhao · 7 years ago
  91. ae15486 soc/cannonlake: Enable SMM code for Cannon Lake by Brandon Breitenstein · 7 years ago
  92. dcf99b0 soc/intel/cannonlake: Sort Kconfig for Cannonlake by Lijian Zhao · 7 years ago
  93. 80358a1 Revert "soc/intel/cannonlake: Add postcar stage support" by Martin Roth · 7 years ago
  94. 399c022 soc/intel/cannonlake: Add postcar stage support by Lijian Zhao · 7 years ago
  95. a77c68a soc/intel/cannonlake: Make ramstage relocatable by Lijian Zhao · 7 years ago
  96. acfc149 soc/intel/cannonlake: Add microcode support by Lijian Zhao · 7 years ago
  97. c854b49 soc/intel/cannonlake: Use common GPIO driver by Andrey Petrov · 7 years ago
  98. 3e2e050 soc/intel/cannonlake: Add early CPU initialization by Andrey Petrov · 7 years ago
  99. 8109604 soc/intel/cannonlake: Add initial dummy directory by Lijian Zhao · 7 years ago