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review.coreboot.org / coreboot / 2751d2922f7c87a6acf901a0008ac131bf7245db / src / soc / rockchip / rk3288 / clock.c
  1. 2751d29 Use common GCD function by Yidi Lin · 8 months ago
  2. cdf99a9 soc/rockchip/rk3288/clock.c: Remove trailing semicolon by Elyes Haouas · 1 year, 9 months ago
  3. 6b5bc77 treewide: Remove "this file is part of" lines by Patrick Georgi · 4 years, 2 months ago
  4. bbc99cf soc/rockchip: Use SPDX for GPL-2.0-only files by Angel Pons · 4 years, 3 months ago
  5. 1c6d8a9 soc: Remove copyright notices by Patrick Georgi · 4 years, 4 months ago
  6. 43d5f7e src/soc/rockchip: Remove unused <stdlib.h> by Elyes HAOUAS · 4 years, 7 months ago
  7. 57e8909 src/soc: change "unsigned" to "unsigned int" by Martin Roth · 4 years, 9 months ago
  8. 13f6650 device/mmio.h: Add include file for MMIO ops by Kyösti Mälkki · 5 years ago
  9. 6df3b64 src: Remove duplicated round up function by Elyes HAOUAS · 6 years ago
  10. 809aeee src/soc: Fix typo by Elyes HAOUAS · 6 years ago
  11. b37c8c0 rockchip: Correct and standardize clock divisor range assertions by Julius Werner · 8 years ago
  12. d4c175b rockchip/rk3288: refactor i2c interface to allow support of rk3399 by huang lin · 8 years ago
  13. a73b931 tree: drop last paragraph of GPL copyright header by Patrick Georgi · 9 years ago
  14. f23216d rockchip/rk3288: Remove 1392MHz option for RK3288 APLL by David Hendricks · 9 years ago
  15. 4a14dc2 rockchip/rk3288: Add 1416MHz as an option for RK3288 APLL by David Hendricks · 9 years ago
  16. c8c099f rockchip/rk3288: Add 600MHz as an option for RK3288 APLL by David Hendricks · 9 years ago
  17. 4bd65e1 rk3288: Allow board-specific APLL (CPU clock) settings by David Hendricks · 9 years ago
  18. 8c3ab6a rockchip: rk3288: multiple NPLL rate in pll_para_config by Yakir Yang · 9 years ago
  19. c2b48e5 rockchip: rk3288: correct ddr 300MHz clock setting by huang lin · 9 years ago
  20. 68f42be rockchip/rk3288: add support for hdmi display by Yakir Yang · 9 years ago
  21. 7a8a4ab lib: Unify log2() and related functions by Julius Werner · 9 years ago
  22. b890a12 Remove address from GPLv2 headers by Patrick Georgi · 9 years ago
  23. 9418476 arm(64): Manually clean up the mess left by write32() transition by Julius Werner · 9 years ago
  24. 2f37bd6 arm(64): Globally replace writel(v, a) with write32(a, v) by Julius Werner · 9 years ago
  25. 33df495 rk3288: Implement support for CRYPTO module and use it in vboot hashing by Julius Werner · 10 years ago
  26. 2460a55 veyron: Trigger hard reset (via GPIO) if last reboot was caused by watchdog by Julius Werner · 10 years ago
  27. 2e2288d rk3288: reset edp after edp clock source select by huang lin · 10 years ago
  28. 40f558e rockchip: support display by huang lin · 10 years ago
  29. 7a453eb rk3288: Change all SoC headers to <soc/headername.h> system by Julius Werner · 10 years ago
  30. a97bd5a rk3288: support tsadc by huang lin · 10 years ago
  31. f8dcdea rk3288: Fix some PLL divisors and improve clock code by Julius Werner · 10 years ago
  32. 08884e3 rk3288: set cpu frequency up to 1.8GHz by huang lin · 10 years ago
  33. b6092b7 veyron_pinky/rk3288: Use KHz, MHz and GHz constants by Julius Werner · 10 years ago
  34. 77a9ebd6 rk3288: remove duplicated #define `PERI_ACLK_DIV_SHIFT` by Aaron Durbin · 9 years ago
  35. bfdd732 rockchip: support pwm regulator by huang lin · 10 years ago
  36. bbcffd9 rockchip: support i2c clock setting by huang lin · 10 years ago
  37. 19420c1 veyron: Fix file permissions by Julius Werner · 10 years ago
  38. 739df1b rk3288: update romstage & mainboard by huang lin · 10 years ago
  39. 82ba4d0 rk3288: add cpu and chip by huang lin · 10 years ago
  40. c33ce35 rk3288: add ddr driver by Jinkun Hong · 10 years ago
  41. 630c86d rk3288: add spi by huang lin · 10 years ago
  42. 503d121 rk3288: add clock module by jinkun.hong · 10 years ago