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review.coreboot.org / coreboot / 0a7c49efa02b770f9f4f723633f82784be7ae6b8 / src / northbridge / intel
  1. 0a7c49e HDA: Enable Mini-HDA and fix up PCH-HDA init by Duncan Laurie · 11 years ago
  2. 356833d haswell: Fix up GPU power management setup by Duncan Laurie · 11 years ago
  3. 118d105 haswell: Export functions for CPU family+model and stepping by Duncan Laurie · 11 years ago
  4. b171179 haswell: Add ACPI support for Controllable TDP by Duncan Laurie · 11 years ago
  5. c70353f haswell: Misc power management setup and fixes by Duncan Laurie · 11 years ago
  6. 5bcca7e haswell: pull in the init code for FUI by Ronald G. Minnich · 11 years ago
  7. 54b8e7a Add Intel FSP northbridge support Sandybridge and Ivybridge by Marc Jones · 11 years ago
  8. 72dccce global: Fix usage of get_option() to make use of CB_CMOS_ codes by Alexandru Gagniuc · 11 years ago
  9. bcfcfa4 haswell: Update pei_data to match ref code by Duncan Laurie · 11 years ago
  10. 932fbd6 Add DDR refresh config to pei data structure. by Shawn Nematbakhsh · 11 years ago
  11. c7f2ab7 haswell: Add magic to turn on grahpics in normal mode by Duncan Laurie · 11 years ago
  12. b1c25e7 haswell: update pei_data data structure by Aaron Durbin · 11 years ago
  13. c6f6be0 Support for nehalem northbridge by Vladimir Serbinenko · 11 years ago
  14. 990555b haswell: Update GT PM register value by Duncan Laurie · 11 years ago
  15. c6f0997 Northbridge: i945: Native VGA init: print the GMA and GTT addresses by Peter Stuge · 11 years ago
  16. 03e4ac6 Northbridge: i945: Native VGA init: use UMA address by Peter Stuge · 11 years ago
  17. 2186b65 lenovo/x60: native vga init: fix code style issues. by Denis 'GNUtoo' Carikli · 11 years ago
  18. 0ce5ebf northbridge/intel/i945/raminit.c: Remove set but unused variable `reg16` by Paul Menzel · 11 years ago
  19. 697927c CBMEM: Define cbmem_top() just once for x86 by Kyösti Mälkki · 11 years ago
  20. f8bf5a1 Revert "CBMEM: Always have early initialisation" by Kyösti Mälkki · 11 years ago
  21. de1fe7f CBMEM: Always have early initialisation by Kyösti Mälkki · 11 years ago
  22. f9f74af CBMEM x86: Unify get_cbmem_toc() by Kyösti Mälkki · 11 years ago
  23. dcb688e CBMEM: Unify get_top_of_ram() by Kyösti Mälkki · 11 years ago
  24. 42f4651 CBMEM northbridges: Remove references to global high_tables_base by Kyösti Mälkki · 11 years ago
  25. 6f9fa86 intel/i5000: remove explicit pcie config accesses by Kyösti Mälkki · 11 years ago
  26. 8aa7e83 intel/i945 intel/i82801gx: remove explicit pcie config accesses by Kyösti Mälkki · 11 years ago
  27. 35a7249 intel/gm45: Use MMCONF_SUPPORT_DEFAULT by Kyösti Mälkki · 11 years ago
  28. 3c46ca3 Sandybridge/Ivybridge: Unify and fix Kconfig defaults by Stefan Reinauer · 11 years ago
  29. 3f9a62e Add pci_devfn_t and use with __SIMPLE_DEVICE__ by Kyösti Mälkki · 11 years ago
  30. fd98c65 intel/sandybridge intel/bd82x6x: remove explicit pcie config accesses by Kyösti Mälkki · 11 years ago
  31. ef84401 Add directive __SIMPLE_DEVICE__ by Kyösti Mälkki · 11 years ago
  32. 0aede11 Drop unused EXTERNAL_MRC_BLOB by Stefan Reinauer · 11 years ago
  33. 33e5df3 Set PCI bus operations at buildtime for ramstage by Kyösti Mälkki · 11 years ago
  34. 9e7806a usbdebug: Move ehci_debug_info allocation by Kyösti Mälkki · 11 years ago
  35. 78c3e33 FUI: reorganize include files by Ronald G. Minnich · 11 years ago
  36. 54d6abd Drop some duplicates of PCI-e config functions by Kyösti Mälkki · 11 years ago
  37. 872c922 Fix MMCONF_SUPPORT_DEFAULT for ramstage by Kyösti Mälkki · 11 years ago
  38. 4f78b18 fox_wtm2: First step support for coreboot-based graphics startup by Ronald G. Minnich · 11 years ago
  39. 2a66d6b FOX_WTM2: First pass at FUI. by Ronald G. Minnich · 11 years ago
  40. 9e97423 intel/i5000: Use MMCONF_SUPPORT_DEFAULT by Kyösti Mälkki · 11 years ago
  41. 575e681 Move select MMCONF_SUPPORT under northbridge (fix) by Kyösti Mälkki · 11 years ago
  42. 032c23d intel/i945: Use MMCONF_SUPPORT_DEFAULT by Kyösti Mälkki · 11 years ago
  43. fbdb085 intel/sandybridge intel/ivybridge: Use MMCONF_SUPPORT_DEFAULT by Kyösti Mälkki · 11 years ago
  44. 15c4ab7 Move select MMCONF_SUPPORT under northbridge by Kyösti Mälkki · 11 years ago
  45. abe6847 Intel GM45, 945, Sandy Bridge: Unify `delay.c` and `udelay.c` by Paul Menzel · 11 years ago
  46. 1cc3416 Add support to enable/disable builtin GbE (again) by Stefan Reinauer · 11 years ago
  47. 714212a Revert "Add support to enable/disable builtin GbE" by Kyösti Mälkki · 11 years ago
  48. 59fb82a intel/sch: Use MMCONF_BASE_ADDRESS by Kyösti Mälkki · 11 years ago
  49. eac00d2 intel/sandybridge: Locate CBMEM TOC early in ramstage by Kyösti Mälkki · 11 years ago
  50. d358a50 Add support to enable/disable builtin GbE by Stefan Reinauer · 11 years ago
  51. 483ff82 sandybridge: Store MRC cache in CBFS by Patrick Georgi · 11 years ago
  52. 7ed7394 i945: Add Display defines for int15h handler. by Denis 'GNUtoo' Carikli · 11 years ago
  53. fd39ddd Intel 945: Select LAPIC_MONOTONIC_TIMER for X86EMU_DEBUG_TIMINGS by Denis 'GNUtoo' Carikli · 11 years ago
  54. a296ce7 Move the MARK_GRAPHICS_MEM_WRCOMB to x86 architecture by Ronald G. Minnich · 11 years ago
  55. 27435d3 haswell: fix overflow handling TOUUD by Aaron Durbin · 11 years ago
  56. 5750fdd Intel GM45, 945, SNB: Move `multiply_to_tsc()` to `tsc.h` by Ronald G. Minnich · 11 years ago
  57. 51837f9 Intel Sandy Bridge: udelay.c: Change comparison from <= to < by Paul Menzel · 11 years ago
  58. 393619b intel/gm45: Add more debug output to read/write training by Nico Huber · 11 years ago
  59. 12276ac intel/gm45: Handle overflows during DDR3 write training by Nico Huber · 11 years ago
  60. 08bee23 intel/gm45: Refactor DDR3 write training by Nico Huber · 11 years ago
  61. 35e45c0 intel/gm45: Handle overflows during DDR3 read training by Nico Huber · 11 years ago
  62. 26a6435 intel/gm45: Refactor DDR3 read training by Nico Huber · 11 years ago
  63. 0da9286 intel/gm45: Fix interpretation of VT-d disable bit by Nico Huber · 11 years ago
  64. 0f43af2 intel/i5000: Remove unused copy of udelay.c by Nico Huber · 11 years ago
  65. c5e036a Get rid of a number of __GNUC__ checks by Stefan Reinauer · 11 years ago
  66. bed88d6 northbridge/intel/i5000/udelay.c: Remove unused header `console.h` by Paul Menzel · 11 years ago
  67. 3f5f6d8 Drop prototype guarding for romcc by Stefan Reinauer · 11 years ago
  68. 7cb1ba9 haswell: use tsc for udelay() by Aaron Durbin · 11 years ago
  69. 243aa44 boot: remove cbmem_post_handling() by Aaron Durbin · 11 years ago
  70. 4b213a8 Intel i945: ACPI: Add _OSC method by Denis 'GNUtoo' Carikli · 11 years ago
  71. ed7e29e Lenovo ThinkPad X60: Add Native VGA init. by Denis 'GNUtoo' Carikli · 11 years ago
  72. c6f2722 sandybridge: enable ROM caching by Aaron Durbin · 11 years ago
  73. f567f16 sandybridge: add option to mark graphics memory write-combining. by Aaron Durbin · 11 years ago
  74. fcfe67c haswell: add option to mark graphics memory write-combining. by Aaron Durbin · 11 years ago
  75. bb4e79a x86: add new mtrr implementation by Aaron Durbin · 11 years ago
  76. c965076 resources: introduce reserved_ram_resource() by Aaron Durbin · 11 years ago
  77. c0cbd6e haswell: use dynamic cbmem by Aaron Durbin · 11 years ago
  78. dd4a6d2 coreboot: dynamic cbmem requirement by Aaron Durbin · 11 years ago
  79. 24d1d4b x86: Unify arch/io.h and arch/romcc_io.h by Stefan Reinauer · 11 years ago
  80. 467f31d haswell/lynxpoint: Use new PCH/PM helper functions by Duncan Laurie · 11 years ago
  81. 969ac8d haswell: Drop the device ID check in graphics init path by Duncan Laurie · 11 years ago
  82. 8ce667e haswell: add multipurpose SMM memory region by Aaron Durbin · 12 years ago
  83. bf396ff haswell: use s3_resume field in romstage_handoff by Aaron Durbin · 12 years ago
  84. 605ca1b haswell: cbmem_get_table_location() implementation by Aaron Durbin · 12 years ago
  85. 0013a69 haswell: drop memory reservation for sandybridge GPU bug by Duncan Laurie · 11 years ago
  86. 2ad1dba haswell: move call site of save_mrc_data() by Aaron Durbin · 12 years ago
  87. 9b7f9b9 haswell: remove unused sys_info structure by Aaron Durbin · 12 years ago
  88. 3d0071b haswell: adjust CAR usage by Aaron Durbin · 12 years ago
  89. 21efd8c haswell: fix ACPI MCFG table by Aaron Durbin · 12 years ago
  90. 7af2069 haswell: enable caching before SMM initialization by Aaron Durbin · 12 years ago
  91. 239c2e8 haswell platforms: restructure romstage main by Aaron Durbin · 12 years ago
  92. e6c3b1d haswell: include TSEG region in cacheable memory by Aaron Durbin · 12 years ago
  93. 86a1110 i945: Replace some two magic values by defined names by Patrick Georgi · 11 years ago
  94. 5c66f08 haswell: don't add a 0-sized memory range resource by Aaron Durbin · 12 years ago
  95. 69efaa0 Google Link: Add remaining code to support native graphics by Ronald G. Minnich · 11 years ago
  96. 1570260 haswell: Fix BDSM and BGSM indicies in memory map by Aaron Durbin · 12 years ago
  97. 1fef1f5 haswell: reserve default SMRAM space by Aaron Durbin · 12 years ago
  98. c12ef97 haswell: resource allocation by Aaron Durbin · 12 years ago
  99. 26e7dd7 haswell: more ULT/LP support and minor tweaks by Duncan Laurie · 12 years ago
  100. 7116129 haswell: Add VGA PCI ID mappings by Aaron Durbin · 12 years ago