- 016cc42 siemens/mc_apl1/variants/mc_apl*: Remove unneeded PTN read by Mario Scheithauer · 4 years, 6 months ago
- 697faf0 siemens/mc_apl4: Set CPU clock to minimum ratio by Werner Zeh · 4 years, 6 months ago
- 5716b4c siemens/mc_apl5: Add new mainboard variant mc_apl5 by Mario Scheithauer · 4 years, 7 months ago
- a5f5790 mb/siemens/mc_apl1/variants/mc_apl*: Remove unused BOARD_SIEMENS_MC_APL*_VAR by Elyes HAOUAS · 4 years, 7 months ago
- f765d4f src: Remove unneeded include <lib.h> by Elyes HAOUAS · 4 years, 7 months ago
- 395cbb4 mb/*/*/Kconfig: Use CONFIG_VARIANT_DIR for devicetree by Peter Lemenkov · 4 years, 7 months ago
- 5f82433 siemens/mc_apl4: Clean up ramstage by Mario Scheithauer · 4 years, 7 months ago
- 6c52c0b siemens/mc_apl4: Overwrite swizzle data for LPDDR4 by Mario Scheithauer · 4 years, 7 months ago
- 5d69297 siemens/mc_apl4: Enable SDCARD by Mario Scheithauer · 4 years, 7 months ago
- adc7d8e siemens/mc_apl4: Remove external RTC from I2C0 by Mario Scheithauer · 4 years, 7 months ago
- 3a49972 siemens/mc_apl4: Enable all PCIe root ports by Mario Scheithauer · 4 years, 7 months ago
- fe73678 siemens/mc_apl4: Remove reduced clock rate for I2C0 by Mario Scheithauer · 4 years, 7 months ago
- c27ce82 siemens/mc_apl4: Disable CLKREQ of PCIe root ports by Mario Scheithauer · 4 years, 7 months ago
- 4946804 siemens/mc_apl3: Disable PCI clock outputs on XIO bridges by Mario Scheithauer · 4 years, 7 months ago
- 04ea73e siemens/mc_apl3: Set Full Reset Bit into Reset Control Register by Mario Scheithauer · 4 years, 7 months ago
- d985cdc siemens/mc_apl3: Set bus master bit for on-board PCI device by Mario Scheithauer · 4 years, 7 months ago
- bcbcecd siemens/mc_apl3: Remove the correction of the Tx signal for SATA by Mario Scheithauer · 4 years, 7 months ago
- 98689df siemens/mc_apl3: Adjust Legacy IRQ routing for PCI devices by Mario Scheithauer · 4 years, 7 months ago
- e510f21 siemens/mc_apl4: Add new mainboard variant mc_apl4 by Mario Scheithauer · 4 years, 7 months ago
- 84672a9 siemens/mc_apl2: Adjust GPIO settings for mc_apl2 by Mario Scheithauer · 4 years, 7 months ago
- c776609 siemens/mc_apl3: Disable I2C7 over devicetree by Mario Scheithauer · 4 years, 7 months ago
- f76acba siemens/mc_apl3: Enable all PCIe root ports by Mario Scheithauer · 4 years, 7 months ago
- 87f8839 siemens/mc_apl3: Remove reduced clock rate for I2C0 by Mario Scheithauer · 4 years, 7 months ago
- 0d0ebb6 siemens/mc_apl3: Disable CLKREQ of PCIe root ports by Mario Scheithauer · 4 years, 7 months ago
- a29d4d2 siemens/mc_apl3: Adjust GPIO settings for mc_apl3 by Mario Scheithauer · 4 years, 7 months ago
- 58bf3e7 siemens/mc_apl3: Add new mainboard variant mc_apl3 by Mario Scheithauer · 4 years, 7 months ago
- d44221f Move compiler.h to commonlib by Nico Huber · 4 years, 8 months ago
- 6bedbd6 soc/intel/common, mb/google, mb/siemens: Use lower case x for RXD by Furquan Shaikh · 4 years, 8 months ago
- 1e67f07 siemens/mc_apl1: Activate clock spreading for PTN3460 by Mario Scheithauer · 4 years, 8 months ago
- 66038c8 siemens/mc_apl1: Add new mainboard variant mc_apl2 by Mario Scheithauer · 4 years, 8 months ago
- 7e15e87 siemens/mc_apl1: Make the DDR memory swizzle data configurable by Mario Scheithauer · 4 years, 8 months ago
- e27c096 siemens/mc_apl1: Correct the Tx signal from SATA interface by Mario Scheithauer · 4 years, 9 months ago
- 403458e siemens/mc_apl1: Extend circuit life by clock gating and power gating by Mario Scheithauer · 4 years, 9 months ago
- 5650896 siemens/mc_apl1: Disable PCI clock outputs on XIO bridge by Mario Scheithauer · 4 years, 9 months ago
- 16ebc98 siemens/mc_apl1: Select DDR50 mode for eMMC by Mario Scheithauer · 4 years, 9 months ago
- 0e1a526 siemens/mc_apl1: Make adjustments for the 1st redesign of this mainboard by Mario Scheithauer · 4 years, 9 months ago
- 053851f siemens/mc_apl1: Move board specific things to mc_apl1 variant by Mario Scheithauer · 4 years, 9 months ago
- c4986eb soc/intel/common/block: Add common chip config block by Subrata Banik · 5 years ago
- 6141353 siemens/mc_apl1: Move board specific things to mc_apl1 variant by Mario Scheithauer · 5 years ago
- d127be1 siemens/mc_apl1: Provide baseboard and variant concepts by Mario Scheithauer · 5 years ago