| Patrick Georgi | ac95903 | 2020-05-05 22:49:26 +0200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-or-later */ |
| Damien Zammit | 43a1f78 | 2015-08-19 15:16:59 +1000 | [diff] [blame] | 2 | |
| Kyösti Mälkki | de64078 | 2019-12-03 07:30:26 +0200 | [diff] [blame] | 3 | #include <arch/bootblock.h> |
| Angel Pons | bbc80f4 | 2021-01-20 13:23:18 +0100 | [diff] [blame] | 4 | #include <assert.h> |
| Elyes Haouas | 8823ba1 | 2022-12-05 08:48:50 +0100 | [diff] [blame] | 5 | #include <device/mmio.h> |
| Angel Pons | 37cae54 | 2021-02-02 16:28:07 +0100 | [diff] [blame] | 6 | #include <device/pci_ops.h> |
| Angel Pons | bbc80f4 | 2021-01-20 13:23:18 +0100 | [diff] [blame] | 7 | #include <types.h> |
| Angel Pons | b8b117c | 2020-09-15 02:26:29 +0200 | [diff] [blame] | 8 | |
| Arthur Heymans | 7843bd5 | 2019-11-11 21:56:37 +0100 | [diff] [blame] | 9 | #include "x4x.h" |
| Kyösti Mälkki | 197a3c6 | 2019-09-27 14:32:20 +0300 | [diff] [blame] | 10 | |
| Angel Pons | bbc80f4 | 2021-01-20 13:23:18 +0100 | [diff] [blame] | 11 | static uint32_t encode_pciexbar_length(void) |
| 12 | { | ||||
| Shelley Chen | 4e9bb33 | 2021-10-20 15:43:45 -0700 | [diff] [blame] | 13 | switch (CONFIG_ECAM_MMCONF_BUS_NUMBER) { |
| Angel Pons | bbc80f4 | 2021-01-20 13:23:18 +0100 | [diff] [blame] | 14 | case 256: return 0 << 1; |
| 15 | case 128: return 1 << 1; | ||||
| 16 | case 64: return 2 << 1; | ||||
| 17 | default: return dead_code_t(uint32_t); | ||||
| 18 | } | ||||
| 19 | } | ||||
| 20 | |||||
| Arthur Heymans | 7843bd5 | 2019-11-11 21:56:37 +0100 | [diff] [blame] | 21 | void bootblock_early_northbridge_init(void) |
| Damien Zammit | 43a1f78 | 2015-08-19 15:16:59 +1000 | [diff] [blame] | 22 | { |
| Damien Zammit | 43a1f78 | 2015-08-19 15:16:59 +1000 | [diff] [blame] | 23 | /* Disable LaGrande Technology (LT) */ |
| Elyes Haouas | a2389ef | 2022-12-03 13:27:54 +0100 | [diff] [blame] | 24 | read32p(TPM_BASE_ADDRESS); |
| Damien Zammit | 43a1f78 | 2015-08-19 15:16:59 +1000 | [diff] [blame] | 25 | |
| Shelley Chen | 4e9bb33 | 2021-10-20 15:43:45 -0700 | [diff] [blame] | 26 | const uint32_t reg32 = CONFIG_ECAM_MMCONF_BASE_ADDRESS | encode_pciexbar_length() | 1; |
| Angel Pons | d1c590a | 2020-08-03 16:01:39 +0200 | [diff] [blame] | 27 | pci_io_write_config32(HOST_BRIDGE, D0F0_PCIEXBAR_LO, reg32); |
| Damien Zammit | 43a1f78 | 2015-08-19 15:16:59 +1000 | [diff] [blame] | 28 | } |