Patrick Georgi | d083595 | 2010-10-05 09:07:10 +0000 | [diff] [blame] | 1 | #include <stdint.h> |
Myles Watson | 3426195 | 2010-03-19 02:33:40 +0000 | [diff] [blame] | 2 | #include <lib.h> /* Prototypes */ |
Patrick Georgi | d083595 | 2010-10-05 09:07:10 +0000 | [diff] [blame] | 3 | #include <console/console.h> |
Myles Watson | 3426195 | 2010-03-19 02:33:40 +0000 | [diff] [blame] | 4 | |
Stefan Reinauer | e0d607a | 2010-03-28 21:31:30 +0000 | [diff] [blame] | 5 | static void write_phys(unsigned long addr, u32 value) |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 6 | { |
Stefan Reinauer | a7acc51 | 2010-02-25 13:40:49 +0000 | [diff] [blame] | 7 | // Assembler in lib/ is very ugly. But we properly guarded |
| 8 | // it so let's obey this one for now |
| 9 | #if CONFIG_SSE2 |
Eric Biederman | 8d9c123 | 2003-06-17 08:42:17 +0000 | [diff] [blame] | 10 | asm volatile( |
| 11 | "movnti %1, (%0)" |
| 12 | : /* outputs */ |
| 13 | : "r" (addr), "r" (value) /* inputs */ |
Stefan Reinauer | e0d607a | 2010-03-28 21:31:30 +0000 | [diff] [blame] | 14 | #ifndef __GNUC__ /* GCC does not like empty clobbers? */ |
Eric Biederman | 8d9c123 | 2003-06-17 08:42:17 +0000 | [diff] [blame] | 15 | : /* clobbers */ |
Stefan Reinauer | 7671293 | 2004-05-27 11:13:24 +0000 | [diff] [blame] | 16 | #endif |
Eric Biederman | 8d9c123 | 2003-06-17 08:42:17 +0000 | [diff] [blame] | 17 | ); |
| 18 | #else |
Eric Biederman | 5268557 | 2003-05-19 19:16:21 +0000 | [diff] [blame] | 19 | volatile unsigned long *ptr; |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 20 | ptr = (void *)addr; |
| 21 | *ptr = value; |
Eric Biederman | 8d9c123 | 2003-06-17 08:42:17 +0000 | [diff] [blame] | 22 | #endif |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 23 | } |
| 24 | |
Stefan Reinauer | e0d607a | 2010-03-28 21:31:30 +0000 | [diff] [blame] | 25 | static u32 read_phys(unsigned long addr) |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 26 | { |
Eric Biederman | 5268557 | 2003-05-19 19:16:21 +0000 | [diff] [blame] | 27 | volatile unsigned long *ptr; |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 28 | ptr = (void *)addr; |
| 29 | return *ptr; |
| 30 | } |
| 31 | |
Stefan Reinauer | e0d607a | 2010-03-28 21:31:30 +0000 | [diff] [blame] | 32 | static void phys_memory_barrier(void) |
| 33 | { |
| 34 | #if CONFIG_SSE2 |
| 35 | // Needed for movnti |
| 36 | asm volatile ( |
| 37 | "sfence" |
| 38 | :: |
| 39 | #ifdef __GNUC__ /* ROMCC does not like memory clobbers */ |
| 40 | : "memory" |
| 41 | #endif |
| 42 | ); |
| 43 | #else |
| 44 | #ifdef __GNUC__ /* ROMCC does not like empty asm statements */ |
| 45 | asm volatile ("" ::: "memory"); |
| 46 | #endif |
| 47 | #endif |
| 48 | } |
| 49 | |
Kyösti Mälkki | e77b9a0 | 2012-03-17 08:09:14 +0100 | [diff] [blame] | 50 | /** |
| 51 | * Rotate ones test pattern that access every bit on a 128bit wide |
| 52 | * memory bus. To test most address lines, addresses are scattered |
| 53 | * using 256B, 4kB and 64kB increments. |
| 54 | * |
Martin Roth | 5f066b2 | 2015-01-04 16:47:39 -0700 | [diff] [blame] | 55 | * @param idx Index to test pattern (0=<idx<0x400) |
| 56 | * @param addr Memory to access on idx |
| 57 | * @param value Value to write or read at addr |
Kyösti Mälkki | e77b9a0 | 2012-03-17 08:09:14 +0100 | [diff] [blame] | 58 | */ |
| 59 | static inline void test_pattern(unsigned short int idx, |
| 60 | unsigned long *addr, unsigned long *value) |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 61 | { |
Kyösti Mälkki | e77b9a0 | 2012-03-17 08:09:14 +0100 | [diff] [blame] | 62 | uint8_t j, k; |
| 63 | |
| 64 | k = (idx >> 8) + 1; |
| 65 | j = (idx >> 4) & 0x0f; |
| 66 | *addr = idx & 0x0f; |
| 67 | *addr |= j << (4*k); |
| 68 | *value = 0x01010101 << (j & 7); |
| 69 | if (j & 8) |
| 70 | *value = ~(*value); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 71 | } |
| 72 | |
Kyösti Mälkki | e77b9a0 | 2012-03-17 08:09:14 +0100 | [diff] [blame] | 73 | /** |
| 74 | * Simple write-read-verify memory test. See console debug output for |
| 75 | * any dislocated bytes. |
| 76 | * |
Martin Roth | 5f066b2 | 2015-01-04 16:47:39 -0700 | [diff] [blame] | 77 | * @param start System memory offset, aligned to 128bytes |
Kyösti Mälkki | e77b9a0 | 2012-03-17 08:09:14 +0100 | [diff] [blame] | 78 | */ |
| 79 | static int ram_bitset_nodie(unsigned long start) |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 80 | { |
Kyösti Mälkki | e77b9a0 | 2012-03-17 08:09:14 +0100 | [diff] [blame] | 81 | unsigned long addr, value, value2; |
| 82 | unsigned short int idx; |
| 83 | unsigned char failed, failures; |
| 84 | uint8_t verbose = 0; |
| 85 | |
Kyösti Mälkki | e77b9a0 | 2012-03-17 08:09:14 +0100 | [diff] [blame] | 86 | printk(BIOS_DEBUG, "DRAM bitset write: 0x%08lx\n", start); |
Kyösti Mälkki | e77b9a0 | 2012-03-17 08:09:14 +0100 | [diff] [blame] | 87 | for (idx=0; idx<0x400; idx+=4) { |
| 88 | test_pattern(idx, &addr, &value); |
| 89 | write_phys(start + addr, value); |
| 90 | } |
| 91 | |
| 92 | /* Make sure we don't read before we wrote */ |
| 93 | phys_memory_barrier(); |
| 94 | |
Kyösti Mälkki | e77b9a0 | 2012-03-17 08:09:14 +0100 | [diff] [blame] | 95 | printk(BIOS_DEBUG, "DRAM bitset verify: 0x%08lx\n", start); |
Kyösti Mälkki | e77b9a0 | 2012-03-17 08:09:14 +0100 | [diff] [blame] | 96 | failures = 0; |
| 97 | for (idx=0; idx<0x400; idx+=4) { |
| 98 | test_pattern(idx, &addr, &value); |
| 99 | value2 = read_phys(start + addr); |
| 100 | |
| 101 | failed = (value2 != value); |
| 102 | failures |= failed; |
| 103 | if (failed && !verbose) { |
Kyösti Mälkki | e77b9a0 | 2012-03-17 08:09:14 +0100 | [diff] [blame] | 104 | printk(BIOS_ERR, "0x%08lx wr: 0x%08lx rd: 0x%08lx FAIL\n", |
| 105 | start + addr, value, value2); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 106 | } |
Kyösti Mälkki | e77b9a0 | 2012-03-17 08:09:14 +0100 | [diff] [blame] | 107 | if (verbose) { |
Kyösti Mälkki | e77b9a0 | 2012-03-17 08:09:14 +0100 | [diff] [blame] | 108 | if ((addr & 0x0f) == 0) |
| 109 | printk(BIOS_DEBUG, "%08lx wr: %08lx rd:", |
| 110 | start + addr, value); |
| 111 | if (failed) |
| 112 | printk(BIOS_DEBUG, " %08lx!", value2); |
| 113 | else |
| 114 | printk(BIOS_DEBUG, " %08lx ", value2); |
| 115 | if ((addr & 0x0f) == 0xc) |
| 116 | printk(BIOS_DEBUG, "\n"); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 117 | } |
| 118 | } |
Kyösti Mälkki | e77b9a0 | 2012-03-17 08:09:14 +0100 | [diff] [blame] | 119 | if (failures) { |
| 120 | post_code(0xea); |
Stefan Reinauer | 64ed2b7 | 2010-03-31 14:47:43 +0000 | [diff] [blame] | 121 | printk(BIOS_DEBUG, "\nDRAM did _NOT_ verify!\n"); |
Sven Schnelle | 3ad8c54 | 2011-12-02 16:23:06 +0100 | [diff] [blame] | 122 | return 1; |
Stefan Reinauer | d686522 | 2015-01-05 13:12:38 -0800 | [diff] [blame] | 123 | } else { |
Stefan Reinauer | 64ed2b7 | 2010-03-31 14:47:43 +0000 | [diff] [blame] | 124 | printk(BIOS_DEBUG, "\nDRAM range verified.\n"); |
Richard Smith | ffb7d8a | 2006-04-01 04:10:44 +0000 | [diff] [blame] | 125 | } |
Sven Schnelle | 3ad8c54 | 2011-12-02 16:23:06 +0100 | [diff] [blame] | 126 | return 0; |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 127 | } |
| 128 | |
| 129 | |
Eric Biederman | 8d9c123 | 2003-06-17 08:42:17 +0000 | [diff] [blame] | 130 | void ram_check(unsigned long start, unsigned long stop) |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 131 | { |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 132 | /* |
| 133 | * This is much more of a "Is my DRAM properly configured?" |
| 134 | * test than a "Is my DRAM faulty?" test. Not all bits |
| 135 | * are tested. -Tyson |
| 136 | */ |
Kyösti Mälkki | e77b9a0 | 2012-03-17 08:09:14 +0100 | [diff] [blame] | 137 | printk(BIOS_DEBUG, "Testing DRAM at: %08lx\n", start); |
Kyösti Mälkki | e77b9a0 | 2012-03-17 08:09:14 +0100 | [diff] [blame] | 138 | if (ram_bitset_nodie(start)) |
Sven Schnelle | 3ad8c54 | 2011-12-02 16:23:06 +0100 | [diff] [blame] | 139 | die("DRAM ERROR"); |
Stefan Reinauer | 64ed2b7 | 2010-03-31 14:47:43 +0000 | [diff] [blame] | 140 | printk(BIOS_DEBUG, "Done.\n"); |
Eric Biederman | 8ca8d76 | 2003-04-22 19:02:15 +0000 | [diff] [blame] | 141 | } |
| 142 | |
Sven Schnelle | 3ad8c54 | 2011-12-02 16:23:06 +0100 | [diff] [blame] | 143 | |
| 144 | int ram_check_nodie(unsigned long start, unsigned long stop) |
| 145 | { |
| 146 | int ret; |
| 147 | /* |
| 148 | * This is much more of a "Is my DRAM properly configured?" |
| 149 | * test than a "Is my DRAM faulty?" test. Not all bits |
| 150 | * are tested. -Tyson |
| 151 | */ |
Kyösti Mälkki | e77b9a0 | 2012-03-17 08:09:14 +0100 | [diff] [blame] | 152 | printk(BIOS_DEBUG, "Testing DRAM at : %08lx\n", start); |
Sven Schnelle | 3ad8c54 | 2011-12-02 16:23:06 +0100 | [diff] [blame] | 153 | |
Kyösti Mälkki | e77b9a0 | 2012-03-17 08:09:14 +0100 | [diff] [blame] | 154 | ret = ram_bitset_nodie(start); |
Sven Schnelle | 3ad8c54 | 2011-12-02 16:23:06 +0100 | [diff] [blame] | 155 | printk(BIOS_DEBUG, "Done.\n"); |
Sven Schnelle | 3ad8c54 | 2011-12-02 16:23:06 +0100 | [diff] [blame] | 156 | return ret; |
| 157 | } |
| 158 | |
Alexandru Gagniuc | 5239ba2 | 2013-06-08 11:32:36 -0500 | [diff] [blame] | 159 | int ram_check_noprint_nodie(unsigned long start, unsigned long stop) |
| 160 | { |
| 161 | unsigned long addr, value, value2; |
| 162 | unsigned short int idx; |
| 163 | unsigned char failed, failures; |
| 164 | |
| 165 | for (idx=0; idx<0x400; idx+=4) { |
| 166 | test_pattern(idx, &addr, &value); |
| 167 | write_phys(start + addr, value); |
| 168 | } |
| 169 | |
| 170 | /* Make sure we don't read before we wrote */ |
| 171 | phys_memory_barrier(); |
| 172 | |
| 173 | failures = 0; |
| 174 | for (idx=0; idx<0x400; idx+=4) { |
| 175 | test_pattern(idx, &addr, &value); |
| 176 | value2 = read_phys(start + addr); |
| 177 | |
| 178 | failed = (value2 != value); |
| 179 | failures |= failed; |
| 180 | } |
| 181 | return failures; |
| 182 | } |
| 183 | |
Stefan Reinauer | e0d607a | 2010-03-28 21:31:30 +0000 | [diff] [blame] | 184 | void quick_ram_check(void) |
| 185 | { |
| 186 | int fail = 0; |
| 187 | u32 backup; |
| 188 | backup = read_phys(CONFIG_RAMBASE); |
| 189 | write_phys(CONFIG_RAMBASE, 0x55555555); |
| 190 | phys_memory_barrier(); |
| 191 | if (read_phys(CONFIG_RAMBASE) != 0x55555555) |
| 192 | fail=1; |
| 193 | write_phys(CONFIG_RAMBASE, 0xaaaaaaaa); |
| 194 | phys_memory_barrier(); |
| 195 | if (read_phys(CONFIG_RAMBASE) != 0xaaaaaaaa) |
| 196 | fail=1; |
| 197 | write_phys(CONFIG_RAMBASE, 0x00000000); |
| 198 | phys_memory_barrier(); |
| 199 | if (read_phys(CONFIG_RAMBASE) != 0x00000000) |
| 200 | fail=1; |
| 201 | write_phys(CONFIG_RAMBASE, 0xffffffff); |
| 202 | phys_memory_barrier(); |
| 203 | if (read_phys(CONFIG_RAMBASE) != 0xffffffff) |
| 204 | fail=1; |
| 205 | |
| 206 | write_phys(CONFIG_RAMBASE, backup); |
| 207 | if (fail) { |
| 208 | post_code(0xea); |
| 209 | die("RAM INIT FAILURE!\n"); |
| 210 | } |
| 211 | phys_memory_barrier(); |
| 212 | } |