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Samuel Holland82651462017-06-03 03:53:33 -05001##
2## This file is part of the coreboot project.
3##
4## Copyright (C) 2015 Damien Zammit <damien@zamaudio.com>
5## Copyright (C) 2017 Arthur Heymans <arthur@aheymans.xyz>
6## Copyright (C) 2017 Samuel Holland <samuel@sholland.org>
7##
8## This program is free software; you can redistribute it and/or modify
9## it under the terms of the GNU General Public License as published by
10## the Free Software Foundation; either version 2 of the License, or
11## (at your option) any later version.
12##
13## This program is distributed in the hope that it will be useful,
14## but WITHOUT ANY WARRANTY; without even the implied warranty of
15## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16## GNU General Public License for more details.
17##
18
19chip northbridge/intel/x4x # Northbridge
20 device cpu_cluster 0 on # APIC cluster
21 chip cpu/intel/socket_LGA775
22 device lapic 0 on end
23 end
24 chip cpu/intel/model_1067x # CPU
25 device lapic 0xACAC off end
26 end
27 end
28 device domain 0 on # PCI domain
Arthur Heymans7ac40962018-12-15 20:58:17 +010029 device pci 0.0 on end # Host Bridge
Samuel Holland82651462017-06-03 03:53:33 -050030 device pci 1.0 on end # PEG
Arthur Heymans7ac40962018-12-15 20:58:17 +010031 device pci 2.0 on end # Integrated graphics controller
Samuel Holland82651462017-06-03 03:53:33 -050032 device pci 2.1 off end # Integrated graphics controller 2
33 device pci 3.0 off end # ME
34 device pci 3.1 off end # ME
35 chip southbridge/intel/i82801gx # Southbridge
36 register "pirqa_routing" = "0x0a"
37 register "pirqb_routing" = "0x0b"
38 register "pirqc_routing" = "0x0a"
39 register "pirqd_routing" = "0x05"
40 register "pirqe_routing" = "0x0a"
41 register "pirqf_routing" = "0x0b"
42 register "pirqg_routing" = "0x0a"
43 register "pirqh_routing" = "0x03"
44
45 register "gpe0_en" = "0x00000441"
46 register "alt_gp_smi_en" = "0x0000"
47
48 register "ide_enable_primary" = "0x0"
49 register "ide_enable_secondary" = "0x0"
Samuel Holland82651462017-06-03 03:53:33 -050050 register "sata_ports_implemented" = "0x3"
51
Arthur Heymansfecf7772019-11-09 14:19:04 +010052 register "gen1_dec" = "0x003c0a01" # Super I/O EC and GPIO
53
Arthur Heymans7ac40962018-12-15 20:58:17 +010054 device pci 1b.0 on end # Audio
Samuel Holland82651462017-06-03 03:53:33 -050055 device pci 1c.0 on end # PCIe 1
56 device pci 1c.1 on # PCIe 2 (NIC)
Arthur Heymans7ac40962018-12-15 20:58:17 +010057 device pci 00.0 on end # PCI 10ec:8168
Samuel Holland82651462017-06-03 03:53:33 -050058 end
59 device pci 1c.2 off end # PCIe 3
60 device pci 1c.3 off end # PCIe 4
Arthur Heymans7ac40962018-12-15 20:58:17 +010061 device pci 1d.0 on end # USB
62 device pci 1d.1 on end # USB
63 device pci 1d.2 on end # USB
64 device pci 1d.3 on end # USB
65 device pci 1d.7 on end # USB
Samuel Holland82651462017-06-03 03:53:33 -050066 device pci 1e.0 on end # PCI bridge
Arthur Heymansb9d25892018-06-15 22:02:28 +020067 device pci 1e.2 off end # AC'97 Audio
68 device pci 1e.3 off end # AC'97 Modem
Samuel Holland82651462017-06-03 03:53:33 -050069 device pci 1f.0 on # ISA bridge
Samuel Holland82651462017-06-03 03:53:33 -050070 chip superio/ite/it8720f # Super I/O
Vagiz Trakhanov17c57712017-09-28 14:21:54 +000071 register "TMPIN1.mode" = "THERMAL_DIODE"
72 register "TMPIN1.offset" = "0"
73 register "TMPIN2.mode" = "THERMAL_RESISTOR"
74 register "TMPIN3.mode" = "THERMAL_MODE_DISABLED"
Samuel Holland82651462017-06-03 03:53:33 -050075
76 register "ec.vin_mask" = "VIN_ALL"
77
78 register "FAN1.mode" = "FAN_SMART_AUTOMATIC" # System fan
79 register "FAN1.smart.tmpin" = "1"
80 register "FAN1.smart.tmp_off" = "25"
81 register "FAN1.smart.tmp_start" = "30"
82 register "FAN1.smart.tmp_full" = "65"
83 register "FAN1.smart.tmp_delta" = "3"
84 register "FAN1.smart.smoothing" = "1"
85 register "FAN1.smart.pwm_start" = "20"
86 register "FAN1.smart.slope" = "10"
87 register "FAN2.mode" = "FAN_SMART_AUTOMATIC" # CPU fan
88 register "FAN2.smart.tmpin" = "1"
89 register "FAN2.smart.tmp_off" = "25"
90 register "FAN2.smart.tmp_start" = "30"
91 register "FAN2.smart.tmp_full" = "65"
92 register "FAN2.smart.tmp_delta" = "3"
93 register "FAN2.smart.smoothing" = "1"
94 register "FAN2.smart.pwm_start" = "20"
95 register "FAN2.smart.slope" = "10"
96 register "FAN3.mode" = "FAN_MODE_OFF" # Not connected
97
98 device pnp 2e.0 off end # Floppy
99 device pnp 2e.1 on # COM1
100 io 0x60 = 0x3f8
101 irq 0x70 = 0x04
102 irq 0xf0 = 0x00
103 irq 0xf1 = 0x50
104 end
105 device pnp 2e.2 on # COM2 (IR)
106 io 0x60 = 0x2f8
107 irq 0x70 = 0x03
108 irq 0xf0 = 0x10 # IrDA SIR mode
109 irq 0xf1 = 0x50
110 end
111 device pnp 2e.3 off end # Parallel port
112 device pnp 2e.4 on # Environment controller
113 io 0x60 = 0xa10
114 io 0x62 = 0xa00
115 irq 0x70 = 0x00
116 irq 0xf0 = 0x80
117 irq 0xf1 = 0x00
118 irq 0xf2 = 0x0a
119 irq 0xf3 = 0x00
120 irq 0xf4 = 0x80
121 irq 0xf5 = 0x00
122 irq 0xf6 = 0x00
123 end
124 device pnp 2e.5 on # Keyboard
125 io 0x60 = 0x060
126 io 0x62 = 0x064
127 irq 0x70 = 0x01
128 irq 0xf0 = 0x00
129 end
130 device pnp 2e.6 on # Mouse
131 irq 0x70 = 0x0c
132 irq 0xf0 = 0x00
133 end
134 device pnp 2e.7 on # GPIO
135 io 0x60 = 0x000
136 io 0x62 = 0xa20
137 io 0x64 = 0xa30
138 irq 0xf0 = 0x00
139 irq 0xf1 = 0x00
140 irq 0xf2 = 0x00
141 irq 0xf3 = 0x00
142 irq 0xf4 = 0x00
143 irq 0xf5 = 0x00
144 irq 0xf6 = 0x22
145 irq 0xf7 = 0x00
146 irq 0xf8 = 0x00
147 irq 0xf9 = 0x00
148 irq 0xfa = 0x00
149 irq 0xfb = 0x00
150 irq 0xfd = 0x00
151 irq 0xfe = 0x00
152 end
153 device pnp 2e.a on # CIR
154 io 0x60 = 0x3e0
155 irq 0x70 = 0x0a
156 irq 0xf0 = 0x00
157 end
158 end
159 end
160 device pci 1f.1 off end # PATA/IDE
Arthur Heymans7ac40962018-12-15 20:58:17 +0100161 device pci 1f.2 on end # SATA
162 device pci 1f.3 on end # SMbus
Samuel Holland82651462017-06-03 03:53:33 -0500163 end
164 end
165end