blob: 84cf353f7ece20788739cb149b95fb710c7f624f [file] [log] [blame]
Samuel Holland82651462017-06-03 03:53:33 -05001##
2## This file is part of the coreboot project.
3##
4## Copyright (C) 2015 Damien Zammit <damien@zamaudio.com>
5## Copyright (C) 2017 Arthur Heymans <arthur@aheymans.xyz>
6## Copyright (C) 2017 Samuel Holland <samuel@sholland.org>
7##
8## This program is free software; you can redistribute it and/or modify
9## it under the terms of the GNU General Public License as published by
10## the Free Software Foundation; either version 2 of the License, or
11## (at your option) any later version.
12##
13## This program is distributed in the hope that it will be useful,
14## but WITHOUT ANY WARRANTY; without even the implied warranty of
15## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16## GNU General Public License for more details.
17##
18
19chip northbridge/intel/x4x # Northbridge
20 device cpu_cluster 0 on # APIC cluster
21 chip cpu/intel/socket_LGA775
22 device lapic 0 on end
23 end
24 chip cpu/intel/model_1067x # CPU
25 device lapic 0xACAC off end
26 end
27 end
28 device domain 0 on # PCI domain
29 subsystemid 0x105b 0x0dda inherit
Arthur Heymans7ac40962018-12-15 20:58:17 +010030 device pci 0.0 on end # Host Bridge
Samuel Holland82651462017-06-03 03:53:33 -050031 device pci 1.0 on end # PEG
Arthur Heymans7ac40962018-12-15 20:58:17 +010032 device pci 2.0 on end # Integrated graphics controller
Samuel Holland82651462017-06-03 03:53:33 -050033 device pci 2.1 off end # Integrated graphics controller 2
34 device pci 3.0 off end # ME
35 device pci 3.1 off end # ME
36 chip southbridge/intel/i82801gx # Southbridge
37 register "pirqa_routing" = "0x0a"
38 register "pirqb_routing" = "0x0b"
39 register "pirqc_routing" = "0x0a"
40 register "pirqd_routing" = "0x05"
41 register "pirqe_routing" = "0x0a"
42 register "pirqf_routing" = "0x0b"
43 register "pirqg_routing" = "0x0a"
44 register "pirqh_routing" = "0x03"
45
46 register "gpe0_en" = "0x00000441"
47 register "alt_gp_smi_en" = "0x0000"
48
49 register "ide_enable_primary" = "0x0"
50 register "ide_enable_secondary" = "0x0"
51 register "sata_ahci" = "0x0" # AHCI does not work
52 register "sata_ports_implemented" = "0x3"
53
Arthur Heymans7ac40962018-12-15 20:58:17 +010054 device pci 1b.0 on end # Audio
Samuel Holland82651462017-06-03 03:53:33 -050055 device pci 1c.0 on end # PCIe 1
56 device pci 1c.1 on # PCIe 2 (NIC)
Arthur Heymans7ac40962018-12-15 20:58:17 +010057 device pci 00.0 on end # PCI 10ec:8168
Samuel Holland82651462017-06-03 03:53:33 -050058 end
59 device pci 1c.2 off end # PCIe 3
60 device pci 1c.3 off end # PCIe 4
Arthur Heymansb9d25892018-06-15 22:02:28 +020061 device pci 1c.4 off end # PCIe 5
62 device pci 1c.5 off end # PCIe 6
Arthur Heymans7ac40962018-12-15 20:58:17 +010063 device pci 1d.0 on end # USB
64 device pci 1d.1 on end # USB
65 device pci 1d.2 on end # USB
66 device pci 1d.3 on end # USB
67 device pci 1d.7 on end # USB
Samuel Holland82651462017-06-03 03:53:33 -050068 device pci 1e.0 on end # PCI bridge
Arthur Heymansb9d25892018-06-15 22:02:28 +020069 device pci 1e.2 off end # AC'97 Audio
70 device pci 1e.3 off end # AC'97 Modem
Samuel Holland82651462017-06-03 03:53:33 -050071 device pci 1f.0 on # ISA bridge
Samuel Holland82651462017-06-03 03:53:33 -050072 chip superio/ite/it8720f # Super I/O
Vagiz Trakhanov17c57712017-09-28 14:21:54 +000073 register "TMPIN1.mode" = "THERMAL_DIODE"
74 register "TMPIN1.offset" = "0"
75 register "TMPIN2.mode" = "THERMAL_RESISTOR"
76 register "TMPIN3.mode" = "THERMAL_MODE_DISABLED"
Samuel Holland82651462017-06-03 03:53:33 -050077
78 register "ec.vin_mask" = "VIN_ALL"
79
80 register "FAN1.mode" = "FAN_SMART_AUTOMATIC" # System fan
81 register "FAN1.smart.tmpin" = "1"
82 register "FAN1.smart.tmp_off" = "25"
83 register "FAN1.smart.tmp_start" = "30"
84 register "FAN1.smart.tmp_full" = "65"
85 register "FAN1.smart.tmp_delta" = "3"
86 register "FAN1.smart.smoothing" = "1"
87 register "FAN1.smart.pwm_start" = "20"
88 register "FAN1.smart.slope" = "10"
89 register "FAN2.mode" = "FAN_SMART_AUTOMATIC" # CPU fan
90 register "FAN2.smart.tmpin" = "1"
91 register "FAN2.smart.tmp_off" = "25"
92 register "FAN2.smart.tmp_start" = "30"
93 register "FAN2.smart.tmp_full" = "65"
94 register "FAN2.smart.tmp_delta" = "3"
95 register "FAN2.smart.smoothing" = "1"
96 register "FAN2.smart.pwm_start" = "20"
97 register "FAN2.smart.slope" = "10"
98 register "FAN3.mode" = "FAN_MODE_OFF" # Not connected
99
100 device pnp 2e.0 off end # Floppy
101 device pnp 2e.1 on # COM1
102 io 0x60 = 0x3f8
103 irq 0x70 = 0x04
104 irq 0xf0 = 0x00
105 irq 0xf1 = 0x50
106 end
107 device pnp 2e.2 on # COM2 (IR)
108 io 0x60 = 0x2f8
109 irq 0x70 = 0x03
110 irq 0xf0 = 0x10 # IrDA SIR mode
111 irq 0xf1 = 0x50
112 end
113 device pnp 2e.3 off end # Parallel port
114 device pnp 2e.4 on # Environment controller
115 io 0x60 = 0xa10
116 io 0x62 = 0xa00
117 irq 0x70 = 0x00
118 irq 0xf0 = 0x80
119 irq 0xf1 = 0x00
120 irq 0xf2 = 0x0a
121 irq 0xf3 = 0x00
122 irq 0xf4 = 0x80
123 irq 0xf5 = 0x00
124 irq 0xf6 = 0x00
125 end
126 device pnp 2e.5 on # Keyboard
127 io 0x60 = 0x060
128 io 0x62 = 0x064
129 irq 0x70 = 0x01
130 irq 0xf0 = 0x00
131 end
132 device pnp 2e.6 on # Mouse
133 irq 0x70 = 0x0c
134 irq 0xf0 = 0x00
135 end
136 device pnp 2e.7 on # GPIO
137 io 0x60 = 0x000
138 io 0x62 = 0xa20
139 io 0x64 = 0xa30
140 irq 0xf0 = 0x00
141 irq 0xf1 = 0x00
142 irq 0xf2 = 0x00
143 irq 0xf3 = 0x00
144 irq 0xf4 = 0x00
145 irq 0xf5 = 0x00
146 irq 0xf6 = 0x22
147 irq 0xf7 = 0x00
148 irq 0xf8 = 0x00
149 irq 0xf9 = 0x00
150 irq 0xfa = 0x00
151 irq 0xfb = 0x00
152 irq 0xfd = 0x00
153 irq 0xfe = 0x00
154 end
155 device pnp 2e.a on # CIR
156 io 0x60 = 0x3e0
157 irq 0x70 = 0x0a
158 irq 0xf0 = 0x00
159 end
160 end
161 end
162 device pci 1f.1 off end # PATA/IDE
Arthur Heymans7ac40962018-12-15 20:58:17 +0100163 device pci 1f.2 on end # SATA
164 device pci 1f.3 on end # SMbus
Samuel Holland82651462017-06-03 03:53:33 -0500165 end
166 end
167end