Angel Pons | 182dbde | 2020-04-02 23:49:05 +0200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
Vladimir Serbinenko | 888d559 | 2013-11-13 17:53:38 +0100 | [diff] [blame] | 2 | |
Kyösti Mälkki | 13f6650 | 2019-03-03 08:01:05 +0200 | [diff] [blame] | 3 | #include <device/mmio.h> |
Kyösti Mälkki | f1b58b7 | 2019-03-01 13:43:02 +0200 | [diff] [blame] | 4 | #include <device/pci_ops.h> |
Vladimir Serbinenko | 888d559 | 2013-11-13 17:53:38 +0100 | [diff] [blame] | 5 | #include <console/console.h> |
| 6 | #include <device/device.h> |
| 7 | #include <device/pci.h> |
| 8 | #include <device/pci_ids.h> |
Kyösti Mälkki | cbf9571 | 2020-01-05 08:05:45 +0200 | [diff] [blame] | 9 | #include <option.h> |
Furquan Shaikh | c0bff97 | 2020-04-30 19:19:33 -0700 | [diff] [blame] | 10 | #include <acpi/acpi_sata.h> |
Elyes HAOUAS | ab89edb | 2019-05-15 21:10:44 +0200 | [diff] [blame] | 11 | #include <types.h> |
| 12 | |
Kyösti Mälkki | 12b121c | 2019-08-18 16:33:39 +0300 | [diff] [blame] | 13 | #include "chip.h" |
Elyes HAOUAS | ab89edb | 2019-05-15 21:10:44 +0200 | [diff] [blame] | 14 | #include "pch.h" |
Vladimir Serbinenko | 888d559 | 2013-11-13 17:53:38 +0100 | [diff] [blame] | 15 | |
Vladimir Serbinenko | 4695705 | 2013-11-26 01:16:20 +0100 | [diff] [blame] | 16 | typedef struct southbridge_intel_ibexpeak_config config_t; |
Vladimir Serbinenko | 888d559 | 2013-11-13 17:53:38 +0100 | [diff] [blame] | 17 | |
| 18 | static inline u32 sir_read(struct device *dev, int idx) |
| 19 | { |
| 20 | pci_write_config32(dev, SATA_SIRI, idx); |
| 21 | return pci_read_config32(dev, SATA_SIRD); |
| 22 | } |
| 23 | |
| 24 | static inline void sir_write(struct device *dev, int idx, u32 value) |
| 25 | { |
| 26 | pci_write_config32(dev, SATA_SIRI, idx); |
| 27 | pci_write_config32(dev, SATA_SIRD, value); |
| 28 | } |
| 29 | |
| 30 | static void sata_init(struct device *dev) |
| 31 | { |
| 32 | u32 reg32; |
| 33 | u16 reg16; |
| 34 | /* Get the chip configuration */ |
| 35 | config_t *config = dev->chip_info; |
Vladimir Serbinenko | 6d6298d | 2014-01-11 07:46:50 +0100 | [diff] [blame] | 36 | u8 sata_mode; |
Vladimir Serbinenko | 888d559 | 2013-11-13 17:53:38 +0100 | [diff] [blame] | 37 | |
| 38 | printk(BIOS_DEBUG, "SATA: Initializing...\n"); |
| 39 | |
| 40 | if (config == NULL) { |
| 41 | printk(BIOS_ERR, "SATA: ERROR: Device not in devicetree.cb!\n"); |
| 42 | return; |
| 43 | } |
| 44 | |
Vladimir Serbinenko | 6d6298d | 2014-01-11 07:46:50 +0100 | [diff] [blame] | 45 | if (get_option(&sata_mode, "sata_mode") != CB_SUCCESS) |
| 46 | /* Default to AHCI */ |
| 47 | sata_mode = 0; |
| 48 | |
Vladimir Serbinenko | 888d559 | 2013-11-13 17:53:38 +0100 | [diff] [blame] | 49 | /* SATA configuration */ |
| 50 | |
| 51 | /* Enable BARs */ |
| 52 | pci_write_config16(dev, PCI_COMMAND, 0x0007); |
| 53 | |
Vladimir Serbinenko | 6d6298d | 2014-01-11 07:46:50 +0100 | [diff] [blame] | 54 | if (sata_mode == 0) { |
| 55 | /* AHCI */ |
Kevin Paul Herbert | bde6d30 | 2014-12-24 18:43:20 -0800 | [diff] [blame] | 56 | u32 *abar; |
Vladimir Serbinenko | 888d559 | 2013-11-13 17:53:38 +0100 | [diff] [blame] | 57 | |
| 58 | printk(BIOS_DEBUG, "SATA: Controller in AHCI mode.\n"); |
| 59 | |
| 60 | /* Set Interrupt Line */ |
| 61 | /* Interrupt Pin is set by D31IP.PIP */ |
| 62 | pci_write_config8(dev, INTR_LN, 0x0b); |
| 63 | |
| 64 | /* Set timings */ |
| 65 | pci_write_config16(dev, IDE_TIM_PRI, IDE_DECODE_ENABLE | |
| 66 | IDE_ISP_5_CLOCKS | IDE_RCT_4_CLOCKS); |
| 67 | pci_write_config16(dev, IDE_TIM_SEC, IDE_DECODE_ENABLE | |
| 68 | IDE_ISP_5_CLOCKS | IDE_RCT_4_CLOCKS); |
| 69 | |
| 70 | /* Sync DMA */ |
| 71 | pci_write_config16(dev, IDE_SDMA_CNT, 0); |
| 72 | pci_write_config16(dev, IDE_SDMA_TIM, 0); |
| 73 | |
| 74 | /* Set IDE I/O Configuration */ |
| 75 | reg32 = SIG_MODE_PRI_NORMAL; // | FAST_PCB1 | FAST_PCB0 | PCB1 | PCB0; |
| 76 | pci_write_config32(dev, IDE_CONFIG, reg32); |
| 77 | |
| 78 | /* for AHCI, Port Enable is managed in memory mapped space */ |
| 79 | reg16 = pci_read_config16(dev, 0x92); |
| 80 | reg16 &= ~0x3f; /* 6 ports SKU + ORM */ |
| 81 | reg16 |= 0x8100 | config->sata_port_map; |
| 82 | pci_write_config16(dev, 0x92, reg16); |
| 83 | |
| 84 | /* SATA Initialization register */ |
| 85 | pci_write_config32(dev, 0x94, |
| 86 | ((config-> |
| 87 | sata_port_map ^ 0x3f) << 24) | 0x183 | |
| 88 | 0x40000000); |
| 89 | pci_write_config32(dev, 0x98, 0x00590200); |
| 90 | |
| 91 | /* Initialize AHCI memory-mapped space */ |
Kevin Paul Herbert | bde6d30 | 2014-12-24 18:43:20 -0800 | [diff] [blame] | 92 | abar = (u32 *)pci_read_config32(dev, PCI_BASE_ADDRESS_5); |
| 93 | printk(BIOS_DEBUG, "ABAR: %p\n", abar); |
Vladimir Serbinenko | 888d559 | 2013-11-13 17:53:38 +0100 | [diff] [blame] | 94 | /* CAP (HBA Capabilities) : enable power management */ |
| 95 | reg32 = read32(abar + 0x00); |
| 96 | reg32 |= 0x0c006000; // set PSC+SSC+SALP+SSS |
| 97 | reg32 &= ~0x00020060; // clear SXS+EMS+PMS |
| 98 | /* Set ISS, if available */ |
| 99 | if (config->sata_interface_speed_support) { |
| 100 | reg32 &= ~0x00f00000; |
| 101 | reg32 |= (config->sata_interface_speed_support & 0x03) |
| 102 | << 20; |
| 103 | } |
| 104 | write32(abar + 0x00, reg32); |
| 105 | /* PI (Ports implemented) */ |
Kyösti Mälkki | 9b5f137 | 2015-02-24 11:53:06 +0200 | [diff] [blame] | 106 | write32(abar + 0x03, config->sata_port_map); |
Kevin Paul Herbert | bde6d30 | 2014-12-24 18:43:20 -0800 | [diff] [blame] | 107 | (void)read32(abar + 0x03); /* Read back 1 */ |
| 108 | (void)read32(abar + 0x03); /* Read back 2 */ |
Vladimir Serbinenko | 888d559 | 2013-11-13 17:53:38 +0100 | [diff] [blame] | 109 | /* CAP2 (HBA Capabilities Extended) */ |
Kevin Paul Herbert | bde6d30 | 2014-12-24 18:43:20 -0800 | [diff] [blame] | 110 | reg32 = read32(abar + 0x09); |
Vladimir Serbinenko | 888d559 | 2013-11-13 17:53:38 +0100 | [diff] [blame] | 111 | reg32 &= ~0x00000002; |
Kevin Paul Herbert | bde6d30 | 2014-12-24 18:43:20 -0800 | [diff] [blame] | 112 | write32(abar + 0x09, reg32); |
Vladimir Serbinenko | 888d559 | 2013-11-13 17:53:38 +0100 | [diff] [blame] | 113 | /* VSP (Vendor Specific Register */ |
Kevin Paul Herbert | bde6d30 | 2014-12-24 18:43:20 -0800 | [diff] [blame] | 114 | reg32 = read32(abar + 0x28); |
Vladimir Serbinenko | 888d559 | 2013-11-13 17:53:38 +0100 | [diff] [blame] | 115 | reg32 &= ~0x00000005; |
Kevin Paul Herbert | bde6d30 | 2014-12-24 18:43:20 -0800 | [diff] [blame] | 116 | write32(abar + 0x28, reg32); |
Vladimir Serbinenko | 888d559 | 2013-11-13 17:53:38 +0100 | [diff] [blame] | 117 | } else { |
Elyes HAOUAS | ba28e8d | 2016-08-31 19:22:16 +0200 | [diff] [blame] | 118 | /* IDE */ |
Vladimir Serbinenko | 888d559 | 2013-11-13 17:53:38 +0100 | [diff] [blame] | 119 | printk(BIOS_DEBUG, "SATA: Controller in plain mode.\n"); |
| 120 | |
| 121 | /* No AHCI: clear AHCI base */ |
| 122 | pci_write_config32(dev, 0x24, 0x00000000); |
| 123 | |
| 124 | /* And without AHCI BAR no memory decoding */ |
| 125 | reg16 = pci_read_config16(dev, PCI_COMMAND); |
| 126 | reg16 &= ~PCI_COMMAND_MEMORY; |
| 127 | pci_write_config16(dev, PCI_COMMAND, reg16); |
| 128 | |
| 129 | /* Native mode capable on both primary and secondary (0xa) |
| 130 | * or'ed with enabled (0x50) = 0xf |
| 131 | */ |
| 132 | pci_write_config8(dev, 0x09, 0x8f); |
| 133 | |
| 134 | /* Set Interrupt Line */ |
| 135 | /* Interrupt Pin is set by D31IP.PIP */ |
| 136 | pci_write_config8(dev, INTR_LN, 0xff); |
| 137 | |
| 138 | /* Set timings */ |
| 139 | pci_write_config16(dev, IDE_TIM_PRI, IDE_DECODE_ENABLE | |
Vladimir Serbinenko | 2dd601e | 2014-01-11 03:40:08 +0100 | [diff] [blame] | 140 | IDE_ISP_5_CLOCKS | IDE_RCT_4_CLOCKS); |
Vladimir Serbinenko | 888d559 | 2013-11-13 17:53:38 +0100 | [diff] [blame] | 141 | pci_write_config16(dev, IDE_TIM_SEC, IDE_DECODE_ENABLE | |
Vladimir Serbinenko | 2dd601e | 2014-01-11 03:40:08 +0100 | [diff] [blame] | 142 | IDE_ISP_5_CLOCKS | IDE_RCT_4_CLOCKS); |
Vladimir Serbinenko | 888d559 | 2013-11-13 17:53:38 +0100 | [diff] [blame] | 143 | |
| 144 | /* Sync DMA */ |
Vladimir Serbinenko | 2dd601e | 2014-01-11 03:40:08 +0100 | [diff] [blame] | 145 | pci_write_config16(dev, IDE_SDMA_CNT, 0); |
| 146 | pci_write_config16(dev, IDE_SDMA_TIM, 0); |
Vladimir Serbinenko | 888d559 | 2013-11-13 17:53:38 +0100 | [diff] [blame] | 147 | |
| 148 | /* Set IDE I/O Configuration */ |
Vladimir Serbinenko | 2dd601e | 2014-01-11 03:40:08 +0100 | [diff] [blame] | 149 | reg32 = SIG_MODE_PRI_NORMAL; |
Vladimir Serbinenko | 888d559 | 2013-11-13 17:53:38 +0100 | [diff] [blame] | 150 | pci_write_config32(dev, IDE_CONFIG, reg32); |
| 151 | |
| 152 | /* Port enable */ |
| 153 | reg16 = pci_read_config16(dev, 0x92); |
| 154 | reg16 &= ~0x3f; |
| 155 | reg16 |= config->sata_port_map; |
| 156 | pci_write_config16(dev, 0x92, reg16); |
| 157 | |
| 158 | /* SATA Initialization register */ |
| 159 | pci_write_config32(dev, 0x94, |
| 160 | ((config-> |
| 161 | sata_port_map ^ 0x3f) << 24) | 0x183); |
| 162 | } |
| 163 | |
Vladimir Serbinenko | 888d559 | 2013-11-13 17:53:38 +0100 | [diff] [blame] | 164 | /* Additional Programming Requirements */ |
| 165 | sir_write(dev, 0x04, 0x00000000); |
| 166 | sir_write(dev, 0x28, 0x0a000033); |
| 167 | reg32 = sir_read(dev, 0x54); |
| 168 | reg32 &= 0xff000000; |
| 169 | reg32 |= 0x555555; |
| 170 | sir_write(dev, 0x54, reg32); |
| 171 | sir_write(dev, 0x64, 0xcccccccc); |
| 172 | reg32 = sir_read(dev, 0x68); |
| 173 | reg32 &= 0xffff0000; |
| 174 | reg32 |= 0xcccc; |
| 175 | sir_write(dev, 0x68, reg32); |
| 176 | reg32 = sir_read(dev, 0x78); |
| 177 | reg32 &= 0x0000ffff; |
| 178 | reg32 |= 0x88880000; |
| 179 | sir_write(dev, 0x78, reg32); |
| 180 | sir_write(dev, 0x84, 0x001c7000); |
| 181 | sir_write(dev, 0x88, 0x88888888); |
| 182 | sir_write(dev, 0xa0, 0x001c7000); |
| 183 | // a4 |
| 184 | sir_write(dev, 0xc4, 0x0c0c0c0c); |
| 185 | sir_write(dev, 0xc8, 0x0c0c0c0c); |
| 186 | sir_write(dev, 0xd4, 0x10000000); |
Vladimir Serbinenko | 888d559 | 2013-11-13 17:53:38 +0100 | [diff] [blame] | 187 | } |
| 188 | |
Elyes HAOUAS | be84140 | 2018-05-13 13:40:39 +0200 | [diff] [blame] | 189 | static void sata_enable(struct device *dev) |
Vladimir Serbinenko | 888d559 | 2013-11-13 17:53:38 +0100 | [diff] [blame] | 190 | { |
| 191 | /* Get the chip configuration */ |
| 192 | config_t *config = dev->chip_info; |
| 193 | u16 map = 0; |
Vladimir Serbinenko | 6d6298d | 2014-01-11 07:46:50 +0100 | [diff] [blame] | 194 | u8 sata_mode; |
Vladimir Serbinenko | 888d559 | 2013-11-13 17:53:38 +0100 | [diff] [blame] | 195 | |
| 196 | if (!config) |
| 197 | return; |
| 198 | |
Vladimir Serbinenko | 6d6298d | 2014-01-11 07:46:50 +0100 | [diff] [blame] | 199 | if (get_option(&sata_mode, "sata_mode") != CB_SUCCESS) |
| 200 | sata_mode = 0; |
| 201 | |
Vladimir Serbinenko | 888d559 | 2013-11-13 17:53:38 +0100 | [diff] [blame] | 202 | /* |
| 203 | * Set SATA controller mode early so the resource allocator can |
| 204 | * properly assign IO/Memory resources for the controller. |
| 205 | */ |
Vladimir Serbinenko | 6d6298d | 2014-01-11 07:46:50 +0100 | [diff] [blame] | 206 | if (sata_mode == 0) |
Vladimir Serbinenko | 888d559 | 2013-11-13 17:53:38 +0100 | [diff] [blame] | 207 | map = 0x0060; |
| 208 | |
| 209 | map |= (config->sata_port_map ^ 0x3f) << 8; |
| 210 | |
| 211 | pci_write_config16(dev, 0x90, map); |
| 212 | } |
| 213 | |
Furquan Shaikh | 7536a39 | 2020-04-24 21:59:21 -0700 | [diff] [blame] | 214 | static void sata_fill_ssdt(const struct device *dev) |
Alexander Couzens | beb31d0 | 2015-04-16 02:23:00 +0200 | [diff] [blame] | 215 | { |
| 216 | config_t *config = dev->chip_info; |
| 217 | generate_sata_ssdt_ports("\\_SB_.PCI0.SATA", config->sata_port_map); |
| 218 | } |
| 219 | |
Vladimir Serbinenko | 888d559 | 2013-11-13 17:53:38 +0100 | [diff] [blame] | 220 | static struct pci_operations sata_pci_ops = { |
Subrata Banik | 4a0f071 | 2019-03-20 14:29:47 +0530 | [diff] [blame] | 221 | .set_subsystem = pci_dev_set_subsystem, |
Vladimir Serbinenko | 888d559 | 2013-11-13 17:53:38 +0100 | [diff] [blame] | 222 | }; |
| 223 | |
| 224 | static struct device_operations sata_ops = { |
| 225 | .read_resources = pci_dev_read_resources, |
| 226 | .set_resources = pci_dev_set_resources, |
| 227 | .enable_resources = pci_dev_enable_resources, |
| 228 | .init = sata_init, |
| 229 | .enable = sata_enable, |
Nico Huber | 68680dd | 2020-03-31 17:34:52 +0200 | [diff] [blame] | 230 | .acpi_fill_ssdt = sata_fill_ssdt, |
Vladimir Serbinenko | 888d559 | 2013-11-13 17:53:38 +0100 | [diff] [blame] | 231 | .ops_pci = &sata_pci_ops, |
| 232 | }; |
| 233 | |
Felix Singer | 838fbc7 | 2019-11-21 21:23:32 +0100 | [diff] [blame] | 234 | static const unsigned short pci_device_ids[] = { |
| 235 | PCI_DID_INTEL_IBEXPEAK_MOBILE_SATA_IDE_1, |
| 236 | PCI_DID_INTEL_IBEXPEAK_MOBILE_SATA_AHCI, |
| 237 | PCI_DID_INTEL_IBEXPEAK_MOBILE_SATA_IDE_2, |
| 238 | 0 |
| 239 | }; |
Vladimir Serbinenko | 888d559 | 2013-11-13 17:53:38 +0100 | [diff] [blame] | 240 | |
| 241 | static const struct pci_driver pch_sata __pci_driver = { |
| 242 | .ops = &sata_ops, |
| 243 | .vendor = PCI_VENDOR_ID_INTEL, |
| 244 | .devices = pci_device_ids, |
| 245 | }; |