Vladimir Serbinenko | 888d559 | 2013-11-13 17:53:38 +0100 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
| 4 | * Copyright (C) 2008-2009 coresystems GmbH |
| 5 | * Copyright (C) 2013 Vladimir Serbinenko |
| 6 | * |
| 7 | * This program is free software; you can redistribute it and/or |
| 8 | * modify it under the terms of the GNU General Public License as |
| 9 | * published by the Free Software Foundation; version 2 of |
| 10 | * the License. |
| 11 | * |
| 12 | * This program is distributed in the hope that it will be useful, |
| 13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 15 | * GNU General Public License for more details. |
Vladimir Serbinenko | 888d559 | 2013-11-13 17:53:38 +0100 | [diff] [blame] | 16 | */ |
| 17 | |
Kyösti Mälkki | 13f6650 | 2019-03-03 08:01:05 +0200 | [diff] [blame] | 18 | #include <device/mmio.h> |
Kyösti Mälkki | f1b58b7 | 2019-03-01 13:43:02 +0200 | [diff] [blame] | 19 | #include <device/pci_ops.h> |
Vladimir Serbinenko | 888d559 | 2013-11-13 17:53:38 +0100 | [diff] [blame] | 20 | #include <console/console.h> |
| 21 | #include <device/device.h> |
| 22 | #include <device/pci.h> |
| 23 | #include <device/pci_ids.h> |
Kyösti Mälkki | cbf9571 | 2020-01-05 08:05:45 +0200 | [diff] [blame^] | 24 | #include <option.h> |
Alexander Couzens | beb31d0 | 2015-04-16 02:23:00 +0200 | [diff] [blame] | 25 | #include <acpi/sata.h> |
Elyes HAOUAS | ab89edb | 2019-05-15 21:10:44 +0200 | [diff] [blame] | 26 | #include <types.h> |
| 27 | |
Kyösti Mälkki | 12b121c | 2019-08-18 16:33:39 +0300 | [diff] [blame] | 28 | #include "chip.h" |
Elyes HAOUAS | ab89edb | 2019-05-15 21:10:44 +0200 | [diff] [blame] | 29 | #include "pch.h" |
Vladimir Serbinenko | 888d559 | 2013-11-13 17:53:38 +0100 | [diff] [blame] | 30 | |
Vladimir Serbinenko | 4695705 | 2013-11-26 01:16:20 +0100 | [diff] [blame] | 31 | typedef struct southbridge_intel_ibexpeak_config config_t; |
Vladimir Serbinenko | 888d559 | 2013-11-13 17:53:38 +0100 | [diff] [blame] | 32 | |
| 33 | static inline u32 sir_read(struct device *dev, int idx) |
| 34 | { |
| 35 | pci_write_config32(dev, SATA_SIRI, idx); |
| 36 | return pci_read_config32(dev, SATA_SIRD); |
| 37 | } |
| 38 | |
| 39 | static inline void sir_write(struct device *dev, int idx, u32 value) |
| 40 | { |
| 41 | pci_write_config32(dev, SATA_SIRI, idx); |
| 42 | pci_write_config32(dev, SATA_SIRD, value); |
| 43 | } |
| 44 | |
| 45 | static void sata_init(struct device *dev) |
| 46 | { |
| 47 | u32 reg32; |
| 48 | u16 reg16; |
| 49 | /* Get the chip configuration */ |
| 50 | config_t *config = dev->chip_info; |
Vladimir Serbinenko | 6d6298d | 2014-01-11 07:46:50 +0100 | [diff] [blame] | 51 | u8 sata_mode; |
Vladimir Serbinenko | 888d559 | 2013-11-13 17:53:38 +0100 | [diff] [blame] | 52 | |
| 53 | printk(BIOS_DEBUG, "SATA: Initializing...\n"); |
| 54 | |
| 55 | if (config == NULL) { |
| 56 | printk(BIOS_ERR, "SATA: ERROR: Device not in devicetree.cb!\n"); |
| 57 | return; |
| 58 | } |
| 59 | |
Vladimir Serbinenko | 6d6298d | 2014-01-11 07:46:50 +0100 | [diff] [blame] | 60 | if (get_option(&sata_mode, "sata_mode") != CB_SUCCESS) |
| 61 | /* Default to AHCI */ |
| 62 | sata_mode = 0; |
| 63 | |
Vladimir Serbinenko | 888d559 | 2013-11-13 17:53:38 +0100 | [diff] [blame] | 64 | /* SATA configuration */ |
| 65 | |
| 66 | /* Enable BARs */ |
| 67 | pci_write_config16(dev, PCI_COMMAND, 0x0007); |
| 68 | |
Vladimir Serbinenko | 6d6298d | 2014-01-11 07:46:50 +0100 | [diff] [blame] | 69 | if (sata_mode == 0) { |
| 70 | /* AHCI */ |
Kevin Paul Herbert | bde6d30 | 2014-12-24 18:43:20 -0800 | [diff] [blame] | 71 | u32 *abar; |
Vladimir Serbinenko | 888d559 | 2013-11-13 17:53:38 +0100 | [diff] [blame] | 72 | |
| 73 | printk(BIOS_DEBUG, "SATA: Controller in AHCI mode.\n"); |
| 74 | |
| 75 | /* Set Interrupt Line */ |
| 76 | /* Interrupt Pin is set by D31IP.PIP */ |
| 77 | pci_write_config8(dev, INTR_LN, 0x0b); |
| 78 | |
| 79 | /* Set timings */ |
| 80 | pci_write_config16(dev, IDE_TIM_PRI, IDE_DECODE_ENABLE | |
| 81 | IDE_ISP_5_CLOCKS | IDE_RCT_4_CLOCKS); |
| 82 | pci_write_config16(dev, IDE_TIM_SEC, IDE_DECODE_ENABLE | |
| 83 | IDE_ISP_5_CLOCKS | IDE_RCT_4_CLOCKS); |
| 84 | |
| 85 | /* Sync DMA */ |
| 86 | pci_write_config16(dev, IDE_SDMA_CNT, 0); |
| 87 | pci_write_config16(dev, IDE_SDMA_TIM, 0); |
| 88 | |
| 89 | /* Set IDE I/O Configuration */ |
| 90 | reg32 = SIG_MODE_PRI_NORMAL; // | FAST_PCB1 | FAST_PCB0 | PCB1 | PCB0; |
| 91 | pci_write_config32(dev, IDE_CONFIG, reg32); |
| 92 | |
| 93 | /* for AHCI, Port Enable is managed in memory mapped space */ |
| 94 | reg16 = pci_read_config16(dev, 0x92); |
| 95 | reg16 &= ~0x3f; /* 6 ports SKU + ORM */ |
| 96 | reg16 |= 0x8100 | config->sata_port_map; |
| 97 | pci_write_config16(dev, 0x92, reg16); |
| 98 | |
| 99 | /* SATA Initialization register */ |
| 100 | pci_write_config32(dev, 0x94, |
| 101 | ((config-> |
| 102 | sata_port_map ^ 0x3f) << 24) | 0x183 | |
| 103 | 0x40000000); |
| 104 | pci_write_config32(dev, 0x98, 0x00590200); |
| 105 | |
| 106 | /* Initialize AHCI memory-mapped space */ |
Kevin Paul Herbert | bde6d30 | 2014-12-24 18:43:20 -0800 | [diff] [blame] | 107 | abar = (u32 *)pci_read_config32(dev, PCI_BASE_ADDRESS_5); |
| 108 | printk(BIOS_DEBUG, "ABAR: %p\n", abar); |
Vladimir Serbinenko | 888d559 | 2013-11-13 17:53:38 +0100 | [diff] [blame] | 109 | /* CAP (HBA Capabilities) : enable power management */ |
| 110 | reg32 = read32(abar + 0x00); |
| 111 | reg32 |= 0x0c006000; // set PSC+SSC+SALP+SSS |
| 112 | reg32 &= ~0x00020060; // clear SXS+EMS+PMS |
| 113 | /* Set ISS, if available */ |
| 114 | if (config->sata_interface_speed_support) { |
| 115 | reg32 &= ~0x00f00000; |
| 116 | reg32 |= (config->sata_interface_speed_support & 0x03) |
| 117 | << 20; |
| 118 | } |
| 119 | write32(abar + 0x00, reg32); |
| 120 | /* PI (Ports implemented) */ |
Kyösti Mälkki | 9b5f137 | 2015-02-24 11:53:06 +0200 | [diff] [blame] | 121 | write32(abar + 0x03, config->sata_port_map); |
Kevin Paul Herbert | bde6d30 | 2014-12-24 18:43:20 -0800 | [diff] [blame] | 122 | (void)read32(abar + 0x03); /* Read back 1 */ |
| 123 | (void)read32(abar + 0x03); /* Read back 2 */ |
Vladimir Serbinenko | 888d559 | 2013-11-13 17:53:38 +0100 | [diff] [blame] | 124 | /* CAP2 (HBA Capabilities Extended) */ |
Kevin Paul Herbert | bde6d30 | 2014-12-24 18:43:20 -0800 | [diff] [blame] | 125 | reg32 = read32(abar + 0x09); |
Vladimir Serbinenko | 888d559 | 2013-11-13 17:53:38 +0100 | [diff] [blame] | 126 | reg32 &= ~0x00000002; |
Kevin Paul Herbert | bde6d30 | 2014-12-24 18:43:20 -0800 | [diff] [blame] | 127 | write32(abar + 0x09, reg32); |
Vladimir Serbinenko | 888d559 | 2013-11-13 17:53:38 +0100 | [diff] [blame] | 128 | /* VSP (Vendor Specific Register */ |
Kevin Paul Herbert | bde6d30 | 2014-12-24 18:43:20 -0800 | [diff] [blame] | 129 | reg32 = read32(abar + 0x28); |
Vladimir Serbinenko | 888d559 | 2013-11-13 17:53:38 +0100 | [diff] [blame] | 130 | reg32 &= ~0x00000005; |
Kevin Paul Herbert | bde6d30 | 2014-12-24 18:43:20 -0800 | [diff] [blame] | 131 | write32(abar + 0x28, reg32); |
Vladimir Serbinenko | 888d559 | 2013-11-13 17:53:38 +0100 | [diff] [blame] | 132 | } else { |
Elyes HAOUAS | ba28e8d | 2016-08-31 19:22:16 +0200 | [diff] [blame] | 133 | /* IDE */ |
Vladimir Serbinenko | 888d559 | 2013-11-13 17:53:38 +0100 | [diff] [blame] | 134 | printk(BIOS_DEBUG, "SATA: Controller in plain mode.\n"); |
| 135 | |
| 136 | /* No AHCI: clear AHCI base */ |
| 137 | pci_write_config32(dev, 0x24, 0x00000000); |
| 138 | |
| 139 | /* And without AHCI BAR no memory decoding */ |
| 140 | reg16 = pci_read_config16(dev, PCI_COMMAND); |
| 141 | reg16 &= ~PCI_COMMAND_MEMORY; |
| 142 | pci_write_config16(dev, PCI_COMMAND, reg16); |
| 143 | |
| 144 | /* Native mode capable on both primary and secondary (0xa) |
| 145 | * or'ed with enabled (0x50) = 0xf |
| 146 | */ |
| 147 | pci_write_config8(dev, 0x09, 0x8f); |
| 148 | |
| 149 | /* Set Interrupt Line */ |
| 150 | /* Interrupt Pin is set by D31IP.PIP */ |
| 151 | pci_write_config8(dev, INTR_LN, 0xff); |
| 152 | |
| 153 | /* Set timings */ |
| 154 | pci_write_config16(dev, IDE_TIM_PRI, IDE_DECODE_ENABLE | |
Vladimir Serbinenko | 2dd601e | 2014-01-11 03:40:08 +0100 | [diff] [blame] | 155 | IDE_ISP_5_CLOCKS | IDE_RCT_4_CLOCKS); |
Vladimir Serbinenko | 888d559 | 2013-11-13 17:53:38 +0100 | [diff] [blame] | 156 | pci_write_config16(dev, IDE_TIM_SEC, IDE_DECODE_ENABLE | |
Vladimir Serbinenko | 2dd601e | 2014-01-11 03:40:08 +0100 | [diff] [blame] | 157 | IDE_ISP_5_CLOCKS | IDE_RCT_4_CLOCKS); |
Vladimir Serbinenko | 888d559 | 2013-11-13 17:53:38 +0100 | [diff] [blame] | 158 | |
| 159 | /* Sync DMA */ |
Vladimir Serbinenko | 2dd601e | 2014-01-11 03:40:08 +0100 | [diff] [blame] | 160 | pci_write_config16(dev, IDE_SDMA_CNT, 0); |
| 161 | pci_write_config16(dev, IDE_SDMA_TIM, 0); |
Vladimir Serbinenko | 888d559 | 2013-11-13 17:53:38 +0100 | [diff] [blame] | 162 | |
| 163 | /* Set IDE I/O Configuration */ |
Vladimir Serbinenko | 2dd601e | 2014-01-11 03:40:08 +0100 | [diff] [blame] | 164 | reg32 = SIG_MODE_PRI_NORMAL; |
Vladimir Serbinenko | 888d559 | 2013-11-13 17:53:38 +0100 | [diff] [blame] | 165 | pci_write_config32(dev, IDE_CONFIG, reg32); |
| 166 | |
| 167 | /* Port enable */ |
| 168 | reg16 = pci_read_config16(dev, 0x92); |
| 169 | reg16 &= ~0x3f; |
| 170 | reg16 |= config->sata_port_map; |
| 171 | pci_write_config16(dev, 0x92, reg16); |
| 172 | |
| 173 | /* SATA Initialization register */ |
| 174 | pci_write_config32(dev, 0x94, |
| 175 | ((config-> |
| 176 | sata_port_map ^ 0x3f) << 24) | 0x183); |
| 177 | } |
| 178 | |
Vladimir Serbinenko | 888d559 | 2013-11-13 17:53:38 +0100 | [diff] [blame] | 179 | /* Additional Programming Requirements */ |
| 180 | sir_write(dev, 0x04, 0x00000000); |
| 181 | sir_write(dev, 0x28, 0x0a000033); |
| 182 | reg32 = sir_read(dev, 0x54); |
| 183 | reg32 &= 0xff000000; |
| 184 | reg32 |= 0x555555; |
| 185 | sir_write(dev, 0x54, reg32); |
| 186 | sir_write(dev, 0x64, 0xcccccccc); |
| 187 | reg32 = sir_read(dev, 0x68); |
| 188 | reg32 &= 0xffff0000; |
| 189 | reg32 |= 0xcccc; |
| 190 | sir_write(dev, 0x68, reg32); |
| 191 | reg32 = sir_read(dev, 0x78); |
| 192 | reg32 &= 0x0000ffff; |
| 193 | reg32 |= 0x88880000; |
| 194 | sir_write(dev, 0x78, reg32); |
| 195 | sir_write(dev, 0x84, 0x001c7000); |
| 196 | sir_write(dev, 0x88, 0x88888888); |
| 197 | sir_write(dev, 0xa0, 0x001c7000); |
| 198 | // a4 |
| 199 | sir_write(dev, 0xc4, 0x0c0c0c0c); |
| 200 | sir_write(dev, 0xc8, 0x0c0c0c0c); |
| 201 | sir_write(dev, 0xd4, 0x10000000); |
Vladimir Serbinenko | 888d559 | 2013-11-13 17:53:38 +0100 | [diff] [blame] | 202 | } |
| 203 | |
Elyes HAOUAS | be84140 | 2018-05-13 13:40:39 +0200 | [diff] [blame] | 204 | static void sata_enable(struct device *dev) |
Vladimir Serbinenko | 888d559 | 2013-11-13 17:53:38 +0100 | [diff] [blame] | 205 | { |
| 206 | /* Get the chip configuration */ |
| 207 | config_t *config = dev->chip_info; |
| 208 | u16 map = 0; |
Vladimir Serbinenko | 6d6298d | 2014-01-11 07:46:50 +0100 | [diff] [blame] | 209 | u8 sata_mode; |
Vladimir Serbinenko | 888d559 | 2013-11-13 17:53:38 +0100 | [diff] [blame] | 210 | |
| 211 | if (!config) |
| 212 | return; |
| 213 | |
Vladimir Serbinenko | 6d6298d | 2014-01-11 07:46:50 +0100 | [diff] [blame] | 214 | if (get_option(&sata_mode, "sata_mode") != CB_SUCCESS) |
| 215 | sata_mode = 0; |
| 216 | |
Vladimir Serbinenko | 888d559 | 2013-11-13 17:53:38 +0100 | [diff] [blame] | 217 | /* |
| 218 | * Set SATA controller mode early so the resource allocator can |
| 219 | * properly assign IO/Memory resources for the controller. |
| 220 | */ |
Vladimir Serbinenko | 6d6298d | 2014-01-11 07:46:50 +0100 | [diff] [blame] | 221 | if (sata_mode == 0) |
Vladimir Serbinenko | 888d559 | 2013-11-13 17:53:38 +0100 | [diff] [blame] | 222 | map = 0x0060; |
| 223 | |
| 224 | map |= (config->sata_port_map ^ 0x3f) << 8; |
| 225 | |
| 226 | pci_write_config16(dev, 0x90, map); |
| 227 | } |
| 228 | |
Elyes HAOUAS | be84140 | 2018-05-13 13:40:39 +0200 | [diff] [blame] | 229 | static void sata_fill_ssdt(struct device *dev) |
Alexander Couzens | beb31d0 | 2015-04-16 02:23:00 +0200 | [diff] [blame] | 230 | { |
| 231 | config_t *config = dev->chip_info; |
| 232 | generate_sata_ssdt_ports("\\_SB_.PCI0.SATA", config->sata_port_map); |
| 233 | } |
| 234 | |
Vladimir Serbinenko | 888d559 | 2013-11-13 17:53:38 +0100 | [diff] [blame] | 235 | static struct pci_operations sata_pci_ops = { |
Subrata Banik | 4a0f071 | 2019-03-20 14:29:47 +0530 | [diff] [blame] | 236 | .set_subsystem = pci_dev_set_subsystem, |
Vladimir Serbinenko | 888d559 | 2013-11-13 17:53:38 +0100 | [diff] [blame] | 237 | }; |
| 238 | |
| 239 | static struct device_operations sata_ops = { |
| 240 | .read_resources = pci_dev_read_resources, |
| 241 | .set_resources = pci_dev_set_resources, |
| 242 | .enable_resources = pci_dev_enable_resources, |
| 243 | .init = sata_init, |
| 244 | .enable = sata_enable, |
Alexander Couzens | beb31d0 | 2015-04-16 02:23:00 +0200 | [diff] [blame] | 245 | .acpi_fill_ssdt_generator = sata_fill_ssdt, |
Vladimir Serbinenko | 888d559 | 2013-11-13 17:53:38 +0100 | [diff] [blame] | 246 | .scan_bus = 0, |
| 247 | .ops_pci = &sata_pci_ops, |
| 248 | }; |
| 249 | |
Vladimir Serbinenko | 56ffa726 | 2014-02-16 18:04:05 +0100 | [diff] [blame] | 250 | static const unsigned short pci_device_ids[] = { 0x3b28, 0x3b29, 0x3b2e, 0 }; |
Vladimir Serbinenko | 888d559 | 2013-11-13 17:53:38 +0100 | [diff] [blame] | 251 | |
| 252 | static const struct pci_driver pch_sata __pci_driver = { |
| 253 | .ops = &sata_ops, |
| 254 | .vendor = PCI_VENDOR_ID_INTEL, |
| 255 | .devices = pci_device_ids, |
| 256 | }; |