Angel Pons | 5f1bf2f | 2020-04-03 01:21:16 +0200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
Gergely Kiss | 3dce9f0 | 2017-12-27 15:24:04 +0100 | [diff] [blame] | 2 | |
| 3 | #include <device/azalia.h> |
Elyes HAOUAS | 19f5ba8 | 2018-10-14 14:52:06 +0200 | [diff] [blame] | 4 | #include <AGESA.h> |
Elyes HAOUAS | 351e3e5 | 2019-04-05 18:11:19 +0200 | [diff] [blame] | 5 | #include <console/console.h> |
Gergely Kiss | 3dce9f0 | 2017-12-27 15:24:04 +0100 | [diff] [blame] | 6 | #include <northbridge/amd/agesa/BiosCallOuts.h> |
| 7 | #include <northbridge/amd/agesa/state_machine.h> |
Elyes HAOUAS | 19f5ba8 | 2018-10-14 14:52:06 +0200 | [diff] [blame] | 8 | #include <FchPlatform.h> |
Kyösti Mälkki | cbf9571 | 2020-01-05 08:05:45 +0200 | [diff] [blame] | 9 | #include <option.h> |
Gergely Kiss | 3dce9f0 | 2017-12-27 15:24:04 +0100 | [diff] [blame] | 10 | #include <types.h> |
| 11 | |
| 12 | const BIOS_CALLOUT_STRUCT BiosCallouts[] = |
| 13 | { |
| 14 | {AGESA_DO_RESET, agesa_Reset }, |
| 15 | {AGESA_READ_SPD, agesa_ReadSpd }, |
| 16 | {AGESA_READ_SPD_RECOVERY, agesa_NoopUnsupported }, |
| 17 | {AGESA_RUNFUNC_ONAP, agesa_RunFuncOnAp }, |
| 18 | {AGESA_GET_IDS_INIT_DATA, agesa_EmptyIdsInitData }, |
| 19 | {AGESA_HOOKBEFORE_DQS_TRAINING, agesa_NoopSuccess }, |
| 20 | {AGESA_HOOKBEFORE_EXIT_SELF_REF, agesa_NoopSuccess }, |
| 21 | {AGESA_GNB_GFX_GET_VBIOS_IMAGE, agesa_GfxGetVbiosImage } |
| 22 | }; |
| 23 | const int BiosCalloutsLen = ARRAY_SIZE(BiosCallouts); |
| 24 | |
| 25 | /** |
| 26 | * CODEC Initialization Table for Azalia HD Audio using Realtek ALC887-VD chip (from linux, running under vendor bios) |
| 27 | */ |
| 28 | const CODEC_ENTRY Alc887_VerbTbl[] = |
| 29 | { |
| 30 | { 0x11, 0x40330000 }, |
| 31 | { 0x12, 0x411111f0 }, |
| 32 | { 0x14, 0x01014010 }, |
| 33 | { 0x15, 0x411111f0 }, |
| 34 | { 0x16, 0x411111f0 }, |
| 35 | { 0x17, 0x411111f0 }, |
| 36 | { 0x18, 0x01a19030 }, |
| 37 | { 0x19, 0x02a19040 }, |
| 38 | { 0x1a, 0x0181303f }, |
| 39 | { 0x1b, 0x02214020 }, |
| 40 | { 0x1c, 0x411111f0 }, |
| 41 | { 0x1d, 0x4024c601 }, |
| 42 | { 0x1e, 0x411111f0 }, |
| 43 | { 0x1f, 0x411111f0 } |
| 44 | }; |
| 45 | |
| 46 | static const CODEC_TBL_LIST CodecTableList[] = |
| 47 | { |
| 48 | {0x10ec0887, (CODEC_ENTRY*)&Alc887_VerbTbl[0]}, |
| 49 | {(UINT32)0x0FFFFFFFF, (CODEC_ENTRY*)0x0FFFFFFFFUL} |
| 50 | }; |
| 51 | |
| 52 | #define FAN_INPUT_INTERNAL_DIODE 0 |
| 53 | #define FAN_INPUT_TEMP0 1 |
| 54 | #define FAN_INPUT_TEMP1 2 |
| 55 | #define FAN_INPUT_TEMP2 3 |
| 56 | #define FAN_INPUT_TEMP3 4 |
| 57 | #define FAN_INPUT_TEMP0_FILTER 5 |
| 58 | #define FAN_INPUT_ZERO 6 |
| 59 | #define FAN_INPUT_DISABLED 7 |
| 60 | |
| 61 | #define FAN_AUTOMODE (1 << 0) |
| 62 | #define FAN_LINEARMODE (1 << 1) |
| 63 | #define FAN_STEPMODE ~(1 << 1) |
| 64 | #define FAN_POLARITY_HIGH (1 << 2) |
| 65 | #define FAN_POLARITY_LOW ~(1 << 2) |
| 66 | |
| 67 | /* Normally, 4-wire fan runs at 25KHz and 3-wire fan runs at 100Hz */ |
| 68 | #define FREQ_28KHZ 0x0 |
| 69 | #define FREQ_25KHZ 0x1 |
| 70 | #define FREQ_23KHZ 0x2 |
| 71 | #define FREQ_21KHZ 0x3 |
| 72 | #define FREQ_29KHZ 0x4 |
| 73 | #define FREQ_18KHZ 0x5 |
| 74 | #define FREQ_100HZ 0xF7 |
| 75 | #define FREQ_87HZ 0xF8 |
| 76 | #define FREQ_58HZ 0xF9 |
| 77 | #define FREQ_44HZ 0xFA |
| 78 | #define FREQ_35HZ 0xFB |
| 79 | #define FREQ_29HZ 0xFC |
| 80 | #define FREQ_22HZ 0xFD |
| 81 | #define FREQ_14HZ 0xFE |
| 82 | #define FREQ_11HZ 0xFF |
| 83 | |
| 84 | void board_FCH_InitReset(struct sysinfo *cb_NA, FCH_RESET_DATA_BLOCK *FchParams_reset) |
| 85 | { |
Julius Werner | cd49cce | 2019-03-05 16:53:33 -0800 | [diff] [blame] | 86 | FchParams_reset->LegacyFree = CONFIG(HUDSON_LEGACY_FREE); |
Gergely Kiss | 3dce9f0 | 2017-12-27 15:24:04 +0100 | [diff] [blame] | 87 | FchParams_reset->Mode = 6; |
| 88 | |
| 89 | /* Read SATA speed setting from CMOS */ |
Angel Pons | 88dcb31 | 2021-04-26 17:10:28 +0200 | [diff] [blame] | 90 | FchParams_reset->SataSetMaxGen2 = get_uint_option("sata_speed", 0); |
Gergely Kiss | 3dce9f0 | 2017-12-27 15:24:04 +0100 | [diff] [blame] | 91 | printk(BIOS_DEBUG, "Force SATA 3Gbps mode = %x\n", FchParams_reset->SataSetMaxGen2); |
| 92 | } |
| 93 | |
| 94 | void board_FCH_InitEnv(struct sysinfo *cb_NA, FCH_DATA_BLOCK *FchParams_env) |
| 95 | { |
| 96 | /* Azalia Controller OEM Codec Table Pointer */ |
| 97 | FchParams_env->Azalia.AzaliaOemCodecTablePtr = (CODEC_TBL_LIST *)(&CodecTableList[0]); |
| 98 | |
| 99 | /* Fan Control */ |
| 100 | FchParams_env->Imc.ImcEnable = FALSE; |
| 101 | FchParams_env->Hwm.HwMonitorEnable = FALSE; |
| 102 | FchParams_env->Hwm.HwmFchtsiAutoPoll = FALSE;/* 1 enable, 0 disable TSI Auto Polling */ |
| 103 | |
| 104 | /* Read SATA controller mode from CMOS */ |
Angel Pons | 88dcb31 | 2021-04-26 17:10:28 +0200 | [diff] [blame] | 105 | FchParams_env->Sata.SataClass = get_uint_option("sata_mode", 0); |
Gergely Kiss | 3dce9f0 | 2017-12-27 15:24:04 +0100 | [diff] [blame] | 106 | |
Gergely Kiss | 3dce9f0 | 2017-12-27 15:24:04 +0100 | [diff] [blame] | 107 | switch ((SATA_CLASS)FchParams_env->Sata.SataClass) { |
| 108 | case SataLegacyIde: |
| 109 | case SataRaid: |
| 110 | case SataAhci: |
| 111 | case SataAhci7804: |
| 112 | FchParams_env->Sata.SataIdeMode = FALSE; |
| 113 | printk(BIOS_DEBUG, "AHCI or RAID or IDE = %x\n", FchParams_env->Sata.SataClass); |
| 114 | break; |
| 115 | |
| 116 | case SataIde2Ahci: |
| 117 | case SataIde2Ahci7804: |
| 118 | default: /* SataNativeIde */ |
| 119 | FchParams_env->Sata.SataIdeMode = TRUE; |
| 120 | printk(BIOS_DEBUG, "IDE2AHCI = %x\n", FchParams_env->Sata.SataClass); |
| 121 | break; |
| 122 | } |
| 123 | } |