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Ronald G. Minnich2a66d6b2013-03-28 17:01:43 -07001/*
2 * This file is part of the coreboot project.
3 *
4 * Copyright 2013 Google Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
18 */
19
20#include <types.h>
21#include <string.h>
22#include <stdlib.h>
23#include <device/device.h>
24#include <device/device.h>
25#include <device/pci_def.h>
26#include <device/pci_ops.h>
27#include <console/console.h>
28#include <delay.h>
29#include <pc80/mc146818rtc.h>
30#include <arch/acpi.h>
31#include <arch/io.h>
32#include <arch/interrupt.h>
Ronald G. Minnich4f78b182013-04-17 16:57:30 -070033#include <boot/coreboot_tables.h>
Ronald G. Minnich2a66d6b2013-03-28 17:01:43 -070034#include <smbios.h>
35#include <device/pci.h>
36#include <ec/google/chromeec/ec.h>
37#include <cbfs_core.h>
38
39#include <cpu/x86/tsc.h>
40#include <cpu/x86/cache.h>
41#include <cpu/x86/mtrr.h>
Ronald G. Minnich2a66d6b2013-03-28 17:01:43 -070042#include <cpu/x86/msr.h>
43#include <edid.h>
Stefan Reinauerf69a27b2015-01-06 13:08:23 -080044#include <drivers/intel/gma/i915.h>
Ronald G. Minnich78c3e332013-04-24 09:50:56 -070045
46/* how many bytes do we need for the framebuffer?
47 * Well, this gets messy. To get an exact answer, we have
48 * to ask the panel, but we'd rather zero the memory
49 * and set up the gtt while the panel powers up. So,
50 * we take a reasonable guess, secure in the knowledge that the
51 * MRC has to overestimate the number of bytes used.
52 * 8 MiB is a very safe guess. There may be a better way later, but
53 * fact is, the initial framebuffer is only very temporary. And taking
54 * a little long is ok; this is done much faster than the AUX
55 * channel is ready for IO.
56 */
57#define FRAME_BUFFER_BYTES (8*MiB)
58/* how many 4096-byte pages do we need for the framebuffer?
59 * There are hard ways to get this, and easy ways:
60 * there are FRAME_BUFFER_BYTES/4096 pages, since pages are 4096
61 * on this chip (and in fact every Intel graphics chip we've seen).
62 */
63#define FRAME_BUFFER_PAGES (FRAME_BUFFER_BYTES/(4096))
Ronald G. Minnich2a66d6b2013-03-28 17:01:43 -070064
Ronald G. Minnich2a66d6b2013-03-28 17:01:43 -070065static int verbose = 0;
66
67static unsigned int *mmio;
68static unsigned int graphics;
69static unsigned short addrport;
70static unsigned short dataport;
71static unsigned int physbase;
Ronald G. Minnich2a66d6b2013-03-28 17:01:43 -070072
73const u32 link_edid_data[] = {
74 0xffffff00, 0x00ffffff, 0x0379e430, 0x00000000,
75 0x04011500, 0x96121ba5, 0xa2d54f02, 0x26935259,
76 0x00545017, 0x01010000, 0x01010101, 0x01010101,
77 0x01010101, 0x6f6d0101, 0xa4a0a000, 0x20306031,
78 0xb510003a, 0x19000010, 0x00000000, 0x00000000,
79 0x00000000, 0x00000000, 0x00000000, 0x4c00fe00,
80 0x69442047, 0x616c7073, 0x20200a79, 0xfe000000,
81 0x31504c00, 0x45513932, 0x50532d31, 0x24003141,
82};
83
Ronald G. Minnich4f78b182013-04-17 16:57:30 -070084static int ioread = 0, iowrite = 0;
Ronald G. Minnich2a66d6b2013-03-28 17:01:43 -070085
86static char *regname(unsigned long addr)
87{
88 static char name[16];
Vladimir Serbinenkoa37383d2013-11-26 02:41:26 +010089 snprintf(name, sizeof (name), "0x%lx", addr);
Ronald G. Minnich2a66d6b2013-03-28 17:01:43 -070090 return name;
91}
92
Ronald G. Minnich4f78b182013-04-17 16:57:30 -070093unsigned long io_i915_read32(unsigned long addr)
Ronald G. Minnich2a66d6b2013-03-28 17:01:43 -070094{
95 unsigned long val;
96 outl(addr, addrport);
97 val = inl(dataport);
Ronald G. Minnich4f78b182013-04-17 16:57:30 -070098 ioread += 2;
Ronald G. Minnich2a66d6b2013-03-28 17:01:43 -070099 if (verbose & vio)printk(BIOS_SPEW, "%s: Got %08lx\n", regname(addr), val);
100 return val;
101}
102
Ronald G. Minnich4f78b182013-04-17 16:57:30 -0700103void io_i915_write32(unsigned long val, unsigned long addr)
Ronald G. Minnich2a66d6b2013-03-28 17:01:43 -0700104{
105 if (verbose & vio)printk(BIOS_SPEW, "%s: outl %08lx\n", regname(addr), val);
106 outl(addr, addrport);
107 outl(val, dataport);
Ronald G. Minnich4f78b182013-04-17 16:57:30 -0700108 iowrite += 2;
Ronald G. Minnich2a66d6b2013-03-28 17:01:43 -0700109}
110
Ronald G. Minnich4f78b182013-04-17 16:57:30 -0700111/* GTT is the Global Translation Table for the graphics pipeline.
112 * It is used to translate graphics addresses to physical
113 * memory addresses. As in the CPU, GTTs map 4K pages.
114 * The setgtt function adds a further bit of flexibility:
115 * it allows you to set a range (the first two parameters) to point
116 * to a physical address (third parameter);the physical address is
117 * incremented by a count (fourth parameter) for each GTT in the
118 * range.
119 * Why do it this way? For ultrafast startup,
120 * we can point all the GTT entries to point to one page,
121 * and set that page to 0s:
122 * memset(physbase, 0, 4096);
123 * setgtt(0, 4250, physbase, 0);
124 * this takes about 2 ms, and is a win because zeroing
125 * the page takes a up to 200 ms.
126 * This call sets the GTT to point to a linear range of pages
127 * starting at physbase.
128 */
Ronald G. Minnich2a66d6b2013-03-28 17:01:43 -0700129
Ronald G. Minnich2a66d6b2013-03-28 17:01:43 -0700130static void
131setgtt(int start, int end, unsigned long base, int inc)
132{
133 int i;
134
135 for(i = start; i < end; i++){
136 u32 word = base + i*inc;
Ronald G. Minnich4f78b182013-04-17 16:57:30 -0700137 io_i915_write32(word|1,(i*4)|1);
Ronald G. Minnich2a66d6b2013-03-28 17:01:43 -0700138 }
139}
140
141static unsigned long tickspermicrosecond = 1795;
142static unsigned long long globalstart;
143
144static unsigned long
145microseconds(unsigned long long start, unsigned long long end)
146{
147 unsigned long ret;
148 ret = ((end - start)/tickspermicrosecond);
149 return ret;
150}
151
152static unsigned long globalmicroseconds(void)
153{
154 return microseconds(globalstart, rdtscll());
155}
156
Ronald G. Minnich2a66d6b2013-03-28 17:01:43 -0700157static int i915_init_done = 0;
158
Ronald G. Minnichb2893a012013-04-23 10:59:11 -0700159int i915lightup(unsigned int physbase, unsigned int iobase, unsigned int mmio,
Ronald G. Minnich2a66d6b2013-03-28 17:01:43 -0700160 unsigned int gfx);
161
162int i915lightup(unsigned int pphysbase, unsigned int piobase,
163 unsigned int pmmio, unsigned int pgfx)
164{
Ronald G. Minnich4f78b182013-04-17 16:57:30 -0700165 int must_cycle_power = 0;
Ronald G. Minnich2a66d6b2013-03-28 17:01:43 -0700166
Ronald G. Minnich4f78b182013-04-17 16:57:30 -0700167 /* frame buffer pointer */
168 u32 *l;
169 int i;
170 unsigned long before_gtt, after_gtt;
171
Ronald G. Minnich2a66d6b2013-03-28 17:01:43 -0700172 mmio = (void *)pmmio;
173 addrport = piobase;
174 dataport = addrport + 4;
175 physbase = pphysbase;
176 graphics = pgfx;
177 printk(BIOS_SPEW,
178 "i915lightup: graphics %p mmio %p"
179 "addrport %04x physbase %08x\n",
180 (void *)graphics, mmio, addrport, physbase);
181 globalstart = rdtscll();
182
Ronald G. Minnich4f78b182013-04-17 16:57:30 -0700183 /* turn it on. The VBIOS does it this way, so we hope that's ok. */
Ronald G. Minnich2a66d6b2013-03-28 17:01:43 -0700184 verbose = 0;
Ronald G. Minnich4f78b182013-04-17 16:57:30 -0700185 io_i915_write32(0xabcd000f, PCH_PP_CONTROL);
186
187 /* the AUX channel needs a small amount of time to spin up.
188 * Rather than udelay, do some useful work:
189 * Zero out the frame buffer memory,
190 * and set the global translation table (GTT)
Ronald G. Minnich2a66d6b2013-03-28 17:01:43 -0700191 */
Ronald G. Minnich4f78b182013-04-17 16:57:30 -0700192 printk(BIOS_SPEW, "Set not-White (%08x) for %d pixels\n", 0xffffff,
193 FRAME_BUFFER_BYTES/sizeof(u32));
194 for(l = (u32 *)graphics, i = 0;
195 i < FRAME_BUFFER_BYTES/sizeof(u32); i++){
196 l[i] = 0x1122ff;
197 }
198 printk(BIOS_SPEW, "GTT: set %d pages starting at %p\n",
199 FRAME_BUFFER_PAGES, (void *)physbase);
200 before_gtt = globalmicroseconds();
Ronald G. Minnich2a66d6b2013-03-28 17:01:43 -0700201 setgtt(0, FRAME_BUFFER_PAGES, physbase, 4096);
Ronald G. Minnich4f78b182013-04-17 16:57:30 -0700202 after_gtt = globalmicroseconds();
203
204 /* The reset is basically harmless, and can be
205 * repeated by the VBIOS in any event.
206 */
207
208 graphics_register_reset(DPA_AUX_CH_CTL, DPA_AUX_CH_DATA1, verbose);
209
210 /* failures after this point can return without
211 * powering off the panel.
212 */
213
214 if (1)
215 goto fail;
216 /* failures after this point MUST power off the panel
217 * and wait 600 ms.
218 */
219
Ronald G. Minnich2a66d6b2013-03-28 17:01:43 -0700220 i915_init_done = 1;
Kyösti Mälkkiab56b3b2013-11-28 16:44:51 +0200221 return i915_init_done;
Ronald G. Minnich4f78b182013-04-17 16:57:30 -0700222
223fail:
224 printk(BIOS_SPEW, "Graphics could not be started;");
225 if (must_cycle_power){
226 printk(BIOS_SPEW, "Turn off power and wait ...");
227 io_i915_write32(0xabcd0000, PCH_PP_CONTROL);
228 udelay(600000);
229 }
230 printk(BIOS_SPEW, "Returning.\n");
Ronald G. Minnich2a66d6b2013-03-28 17:01:43 -0700231 return 0;
Ronald G. Minnich4f78b182013-04-17 16:57:30 -0700232
Ronald G. Minnich2a66d6b2013-03-28 17:01:43 -0700233}