| Jonathon Hall | a86704a | 2023-09-14 14:41:20 -0400 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-or-later */ |
| 2 | |
| 3 | #include <gpio.h> |
| 4 | #include <memory_info.h> |
| 5 | #include <soc/meminit.h> |
| 6 | #include <soc/romstage.h> |
| 7 | #include <device/pci_ops.h> |
| 8 | #include <console/console.h> |
| 9 | |
| 10 | static const struct mb_cfg board_mem_cfg = { |
| 11 | .dq_map[DDR_CH0] = { |
| 12 | {0x0f, 0xf0}, |
| 13 | {0x0f, 0xf0}, |
| 14 | {0xff, 0x00}, |
| 15 | {0x00, 0x00}, |
| 16 | {0x00, 0x00}, |
| 17 | {0x00, 0x00} |
| 18 | }, |
| 19 | .dq_map[DDR_CH1] = { |
| 20 | {0x0f, 0xf0}, |
| 21 | {0x0f, 0xf0}, |
| 22 | {0xff, 0x00}, |
| 23 | {0x00, 0x00}, |
| 24 | {0x00, 0x00}, |
| 25 | {0x00, 0x00} |
| 26 | }, |
| 27 | |
| 28 | .dqs_map[DDR_CH0] = {0, 3, 2, 1, 5, 7, 4, 6}, |
| 29 | .dqs_map[DDR_CH1] = {3, 1, 2, 0, 4, 7, 6, 5}, |
| 30 | |
| 31 | /* Enable Early Command Training */ |
| 32 | .ect = 1, |
| 33 | |
| 34 | /* User Board Type */ |
| 35 | .UserBd = BOARD_TYPE_ULT_ULX, |
| 36 | }; |
| 37 | |
| 38 | void mainboard_memory_init_params(FSPM_UPD *memupd) |
| 39 | { |
| 40 | const struct spd_info spd_info = { |
| 41 | .read_type = READ_SPD_CBFS, |
| 42 | .spd_spec.spd_index = 0, |
| 43 | }; |
| 44 | |
| 45 | memcfg_init(&memupd->FspmConfig, &board_mem_cfg, &spd_info, false); |
| 46 | } |