mb/purism/librem_jsl: Add support for Librem 11
This adds support for the Librem 11 tablet, using the ME 13.50.15.1436
binary from the original BIOS (version 28.D8.E1.021) and FSP binaries
from a Jasper Lake Chromebook.
The following features were tested with PureOS:
* Audio (speakers, microphone, headset jack)
* Cameras
* Display
* Touchscreen and pen
* Keyboard cover, with tablet/laptop mode switch indicated via ACPI
* Power and volume buttons
* USB-C ports (USB 2/3, DP alt mode, PD charging)
* SD card reader
* WLAN
* Bluetooth
* NVMe SSD (socketed)
* Battery state information from EC
* Accelerometer
A UART is accessible with soldering via test points on the mainboard,
documented in the mainboard Kconfig with a toggle to enable it for
coreboot logging.
Change-Id: I545994889ddfb41f56de09b3a42840bccbd7c4aa
Signed-off-by: Jonathon Hall <jonathon.hall@puri.sm>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/78343
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
diff --git a/src/mainboard/purism/librem_jsl/romstage.c b/src/mainboard/purism/librem_jsl/romstage.c
new file mode 100644
index 0000000..65205ad
--- /dev/null
+++ b/src/mainboard/purism/librem_jsl/romstage.c
@@ -0,0 +1,46 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
+#include <gpio.h>
+#include <memory_info.h>
+#include <soc/meminit.h>
+#include <soc/romstage.h>
+#include <device/pci_ops.h>
+#include <console/console.h>
+
+static const struct mb_cfg board_mem_cfg = {
+ .dq_map[DDR_CH0] = {
+ {0x0f, 0xf0},
+ {0x0f, 0xf0},
+ {0xff, 0x00},
+ {0x00, 0x00},
+ {0x00, 0x00},
+ {0x00, 0x00}
+ },
+ .dq_map[DDR_CH1] = {
+ {0x0f, 0xf0},
+ {0x0f, 0xf0},
+ {0xff, 0x00},
+ {0x00, 0x00},
+ {0x00, 0x00},
+ {0x00, 0x00}
+ },
+
+ .dqs_map[DDR_CH0] = {0, 3, 2, 1, 5, 7, 4, 6},
+ .dqs_map[DDR_CH1] = {3, 1, 2, 0, 4, 7, 6, 5},
+
+ /* Enable Early Command Training */
+ .ect = 1,
+
+ /* User Board Type */
+ .UserBd = BOARD_TYPE_ULT_ULX,
+};
+
+void mainboard_memory_init_params(FSPM_UPD *memupd)
+{
+ const struct spd_info spd_info = {
+ .read_type = READ_SPD_CBFS,
+ .spd_spec.spd_index = 0,
+ };
+
+ memcfg_init(&memupd->FspmConfig, &board_mem_cfg, &spd_info, false);
+}