blob: a201ef42f2ab7033618680fb6c9a3262c5dd57e2 [file] [log] [blame]
Eric Biedermanc84c1902004-10-14 20:13:01 +00001#ifndef CPU_X86_MSR_H
2#define CPU_X86_MSR_H
3
Stefan Reinauer35b6bbb2010-03-28 21:26:54 +00004#if defined(__ROMCC__)
Eric Biedermanc84c1902004-10-14 20:13:01 +00005
6typedef __builtin_msr_t msr_t;
7
8static msr_t rdmsr(unsigned long index)
9{
10 return __builtin_rdmsr(index);
11}
12
13static void wrmsr(unsigned long index, msr_t msr)
14{
15 __builtin_wrmsr(index, msr.lo, msr.hi);
16}
17
arch import user (historical)6ca76362005-07-06 17:17:25 +000018#else
Eric Biedermanc84c1902004-10-14 20:13:01 +000019
Stefan Reinauer14e22772010-04-27 06:56:47 +000020typedef struct msr_struct
Eric Biedermanc84c1902004-10-14 20:13:01 +000021{
22 unsigned lo;
23 unsigned hi;
24} msr_t;
25
Edwin Beasantf333ba02010-06-10 15:24:57 +000026typedef struct msrinit_struct
27{
28 unsigned index;
29 msr_t msr;
30} msrinit_t;
31
Eric Biedermanc84c1902004-10-14 20:13:01 +000032static inline msr_t rdmsr(unsigned index)
33{
34 msr_t result;
35 __asm__ __volatile__ (
36 "rdmsr"
37 : "=a" (result.lo), "=d" (result.hi)
38 : "c" (index)
39 );
40 return result;
41}
42
43static inline void wrmsr(unsigned index, msr_t msr)
44{
45 __asm__ __volatile__ (
46 "wrmsr"
47 : /* No outputs */
48 : "c" (index), "a" (msr.lo), "d" (msr.hi)
49 );
50}
51
Myles Watson1d6d45e2009-11-06 17:02:51 +000052#endif /* __ROMCC__ */
Eric Biedermanc84c1902004-10-14 20:13:01 +000053
Eric Biedermanc84c1902004-10-14 20:13:01 +000054#endif /* CPU_X86_MSR_H */