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Eric Biedermanc84c1902004-10-14 20:13:01 +00001#ifndef CPU_X86_MSR_H
2#define CPU_X86_MSR_H
3
arch import user (historical)6ca76362005-07-06 17:17:25 +00004#if defined( __ROMCC__) && !defined (__GNUC__)
Eric Biedermanc84c1902004-10-14 20:13:01 +00005
6typedef __builtin_msr_t msr_t;
7
8static msr_t rdmsr(unsigned long index)
9{
10 return __builtin_rdmsr(index);
11}
12
13static void wrmsr(unsigned long index, msr_t msr)
14{
15 __builtin_wrmsr(index, msr.lo, msr.hi);
16}
17
arch import user (historical)6ca76362005-07-06 17:17:25 +000018#else
Eric Biedermanc84c1902004-10-14 20:13:01 +000019
20typedef struct msr_struct
21{
22 unsigned lo;
23 unsigned hi;
24} msr_t;
25
26static inline msr_t rdmsr(unsigned index)
27{
28 msr_t result;
29 __asm__ __volatile__ (
30 "rdmsr"
31 : "=a" (result.lo), "=d" (result.hi)
32 : "c" (index)
33 );
34 return result;
35}
36
37static inline void wrmsr(unsigned index, msr_t msr)
38{
39 __asm__ __volatile__ (
40 "wrmsr"
41 : /* No outputs */
42 : "c" (index), "a" (msr.lo), "d" (msr.hi)
43 );
44}
45
arch import user (historical)6ca76362005-07-06 17:17:25 +000046#endif /* ROMCC__ && !__GNUC__ */
Eric Biedermanc84c1902004-10-14 20:13:01 +000047
48
49#endif /* CPU_X86_MSR_H */