Frank Vibrans | 2b4c831 | 2011-02-14 18:30:54 +0000 | [diff] [blame] | 1 | /** |
| 2 | * @file |
| 3 | * |
| 4 | * SB Initialization. |
| 5 | * |
| 6 | * Init IOAPIC/IOMMU/Misc NB features. |
| 7 | * |
| 8 | * @xrefitem bom "File Content Label" "Release Content" |
| 9 | * @e project: CIMx-SB |
| 10 | * @e sub-project: |
| 11 | * @e \$Revision:$ @e \$Date:$ |
| 12 | * |
| 13 | */ |
| 14 | /* |
| 15 | ***************************************************************************** |
| 16 | * |
| 17 | * Copyright (c) 2011, Advanced Micro Devices, Inc. |
| 18 | * All rights reserved. |
Edward O'Callaghan | ef5981b | 2014-07-06 19:20:52 +1000 | [diff] [blame^] | 19 | * |
Frank Vibrans | 2b4c831 | 2011-02-14 18:30:54 +0000 | [diff] [blame] | 20 | * Redistribution and use in source and binary forms, with or without |
| 21 | * modification, are permitted provided that the following conditions are met: |
| 22 | * * Redistributions of source code must retain the above copyright |
| 23 | * notice, this list of conditions and the following disclaimer. |
| 24 | * * Redistributions in binary form must reproduce the above copyright |
| 25 | * notice, this list of conditions and the following disclaimer in the |
| 26 | * documentation and/or other materials provided with the distribution. |
Edward O'Callaghan | ef5981b | 2014-07-06 19:20:52 +1000 | [diff] [blame^] | 27 | * * Neither the name of Advanced Micro Devices, Inc. nor the names of |
| 28 | * its contributors may be used to endorse or promote products derived |
Frank Vibrans | 2b4c831 | 2011-02-14 18:30:54 +0000 | [diff] [blame] | 29 | * from this software without specific prior written permission. |
Edward O'Callaghan | ef5981b | 2014-07-06 19:20:52 +1000 | [diff] [blame^] | 30 | * |
Frank Vibrans | 2b4c831 | 2011-02-14 18:30:54 +0000 | [diff] [blame] | 31 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND |
| 32 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED |
| 33 | * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
| 34 | * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY |
| 35 | * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES |
| 36 | * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
| 37 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND |
| 38 | * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| 39 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS |
| 40 | * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
Edward O'Callaghan | ef5981b | 2014-07-06 19:20:52 +1000 | [diff] [blame^] | 41 | * |
Frank Vibrans | 2b4c831 | 2011-02-14 18:30:54 +0000 | [diff] [blame] | 42 | * *************************************************************************** |
| 43 | * |
| 44 | */ |
| 45 | |
| 46 | #include "SBPLATFORM.h" |
| 47 | #include "cbtypes.h" |
| 48 | |
| 49 | #ifndef B1_IMAGE |
| 50 | |
| 51 | /*----------------------------------------------------------------------------------------*/ |
| 52 | /** |
| 53 | * sbBeforePciInit - Config Southbridge before PCI emulation |
| 54 | * |
| 55 | * |
| 56 | * |
| 57 | * @param[in] pConfig Southbridge configuration structure pointer. |
| 58 | * |
| 59 | */ |
| 60 | |
| 61 | VOID |
| 62 | sbBeforePciInit ( |
| 63 | IN AMDSBCFG* pConfig |
| 64 | ) |
| 65 | { |
| 66 | commonInitEarlyBoot (pConfig); |
| 67 | commonInitEarlyPost (pConfig); |
| 68 | #ifndef NO_EC_SUPPORT |
| 69 | ecInitBeforePciEnum (pConfig); |
| 70 | #endif |
| 71 | usbInitBeforePciEnum (pConfig); // USB POST TIME Only |
| 72 | sataInitBeforePciEnum (pConfig); // Init SATA class code and PHY |
| 73 | gecInitBeforePciEnum (pConfig); // Init GEC |
| 74 | azaliaInitBeforePciEnum (pConfig); // Detect and configure High Definition Audio |
| 75 | sbPcieGppEarlyInit (pConfig); // Gpp port init |
| 76 | abSpecialSetBeforePciEnum (pConfig); |
| 77 | usbDesertPll (pConfig); |
| 78 | } |
| 79 | |
| 80 | /** |
| 81 | * sbAfterPciInit - Config Southbridge after PCI emulation |
| 82 | * |
| 83 | * |
| 84 | * |
| 85 | * @param[in] pConfig Southbridge configuration structure pointer. |
| 86 | * |
| 87 | */ |
| 88 | VOID |
| 89 | sbAfterPciInit ( |
| 90 | IN AMDSBCFG* pConfig |
| 91 | ) |
| 92 | { |
| 93 | usbInitAfterPciInit (pConfig); // Init USB MMIO |
| 94 | sataInitAfterPciEnum (pConfig); // SATA port enumeration |
| 95 | gecInitAfterPciEnum (pConfig); |
| 96 | azaliaInitAfterPciEnum (pConfig); // Detect and configure High Definition Audio |
| 97 | |
| 98 | #ifndef NO_HWM_SUPPORT |
| 99 | hwmInit (pConfig); |
| 100 | #endif |
| 101 | } |
| 102 | |
| 103 | /** |
| 104 | * sbMidPostInit - Config Southbridge during middle of POST |
| 105 | * |
| 106 | * |
| 107 | * |
| 108 | * @param[in] pConfig Southbridge configuration structure pointer. |
| 109 | * |
| 110 | */ |
| 111 | VOID |
| 112 | sbMidPostInit ( |
| 113 | IN AMDSBCFG* pConfig |
| 114 | ) |
| 115 | { |
| 116 | sataInitMidPost (pConfig); |
| 117 | } |
| 118 | |
| 119 | /*----------------------------------------------------------------------------------------*/ |
| 120 | /** |
| 121 | * sbLatePost - Prepare Southbridge to boot to OS. |
| 122 | * |
| 123 | * |
| 124 | * |
| 125 | * @param[in] pConfig Southbridge configuration structure pointer. |
| 126 | * |
| 127 | */ |
| 128 | VOID |
| 129 | sbLatePost ( |
| 130 | IN AMDSBCFG* pConfig |
| 131 | ) |
| 132 | { |
| 133 | // UINT16 dwVar; |
| 134 | BUILDPARAM *pStaticOptions; |
| 135 | pStaticOptions = &(pConfig->BuildParameters); |
| 136 | commonInitLateBoot (pConfig); |
| 137 | sataInitLatePost (pConfig); |
| 138 | gecInitLatePost (pConfig); |
| 139 | hpetInit (pConfig, pStaticOptions); // SB Configure HPET base and enable bit |
| 140 | #ifndef NO_EC_SUPPORT |
| 141 | ecInitLatePost (pConfig); |
| 142 | #endif |
| 143 | sbPcieGppLateInit (pConfig); |
| 144 | |
| 145 | } |
| 146 | |
| 147 | /*----------------------------------------------------------------------------------------*/ |
| 148 | /** |
| 149 | * sbBeforePciRestoreInit - Config Southbridge before ACPI S3 resume PCI config device restore |
| 150 | * |
| 151 | * |
| 152 | * |
| 153 | * @param[in] pConfig Southbridge configuration structure pointer. |
| 154 | * |
| 155 | */ |
| 156 | |
| 157 | VOID |
| 158 | sbBeforePciRestoreInit ( |
| 159 | IN AMDSBCFG* pConfig |
| 160 | ) |
| 161 | { |
| 162 | pConfig->S3Resume = 1; |
| 163 | commonInitEarlyBoot (pConfig); // set /SMBUS/ACPI/IDE/LPC/PCIB |
| 164 | abLinkInitBeforePciEnum (pConfig); // Set ABCFG registers |
| 165 | usbInitBeforePciEnum (pConfig); // USB POST TIME Only |
| 166 | sataInitBeforePciEnum (pConfig); |
| 167 | gecInitBeforePciEnum (pConfig); // Init GEC |
| 168 | azaliaInitBeforePciEnum (pConfig); // Detect and configure High Definition Audio |
| 169 | sbPcieGppEarlyInit (pConfig); // Gpp port init |
| 170 | abSpecialSetBeforePciEnum (pConfig); |
| 171 | } |
| 172 | |
| 173 | /*----------------------------------------------------------------------------------------*/ |
| 174 | /** |
| 175 | * sbAfterPciRestoreInit - Config Southbridge after ACPI S3 resume PCI config device restore |
| 176 | * |
| 177 | * |
| 178 | * |
| 179 | * @param[in] pConfig Southbridge configuration structure pointer. |
| 180 | * |
| 181 | */ |
| 182 | |
| 183 | VOID |
| 184 | sbAfterPciRestoreInit ( |
| 185 | IN AMDSBCFG* pConfig |
| 186 | ) |
| 187 | { |
| 188 | BUILDPARAM *pStaticOptions; |
| 189 | |
| 190 | pConfig->S3Resume = 1; |
| 191 | |
| 192 | usbSetPllDuringS3 (pConfig); |
| 193 | pStaticOptions = &(pConfig->BuildParameters); |
| 194 | commonInitLateBoot (pConfig); |
| 195 | sataInitAfterPciEnum (pConfig); |
| 196 | gecInitAfterPciEnum (pConfig); |
| 197 | azaliaInitAfterPciEnum (pConfig); // Detect and configure High Definition Audio |
| 198 | hpetInit (pConfig, pStaticOptions); // SB Configure HPET base and enable bit |
| 199 | sataInitLatePost (pConfig); |
| 200 | c3PopupSetting (pConfig); |
| 201 | |
| 202 | #ifndef NO_HWM_SUPPORT |
| 203 | SBIMCFanInitializeS3 (); |
| 204 | #endif |
| 205 | } |
| 206 | |
| 207 | /*----------------------------------------------------------------------------------------*/ |
| 208 | /** |
| 209 | * sbSmmAcpiOn - Config Southbridge during ACPI_ON |
| 210 | * |
| 211 | * |
| 212 | * |
| 213 | * @param[in] pConfig Southbridge configuration structure pointer. |
| 214 | * |
| 215 | */ |
| 216 | VOID |
| 217 | sbSmmAcpiOn ( |
| 218 | IN AMDSBCFG* pConfig |
| 219 | ) |
| 220 | { |
| 221 | // Commented the following code since we need to leave the IRQ1/12 filtering enabled always as per latest |
| 222 | // recommendation in RPR. This is required to fix the keyboard stuck issue when playing games under Windows |
| 223 | AMDSBCFG* pTmp; //lx-dummy for /W4 build |
| 224 | pTmp = pConfig; |
| 225 | |
| 226 | // Disable Power Button SMI |
| 227 | RWMEM (ACPI_MMIO_BASE + SMI_BASE + SB_SMI_REGB2, AccWidthUint8, ~(BIT4 + BIT5), 0); |
| 228 | RWMEM (ACPI_MMIO_BASE + SMI_BASE + SB_SMI_REGAC, AccWidthUint8, ~(BIT6 + BIT7), 0); |
| 229 | } |
| 230 | |
| 231 | #endif |
| 232 | |
| 233 | /*----------------------------------------------------------------------------------------*/ |
| 234 | /** |
| 235 | * Call Back routine. |
| 236 | * |
| 237 | * |
| 238 | * |
| 239 | * @param[in] Func Callback ID. |
| 240 | * @param[in] Data Callback specific data. |
| 241 | * @param[in] pConfig Southbridge configuration structure pointer. |
| 242 | */ |
| 243 | UINTN |
| 244 | CallBackToOEM ( |
| 245 | IN UINT32 Func, |
| 246 | IN UINT32 Data, |
| 247 | IN AMDSBCFG* pConfig |
| 248 | ) |
| 249 | { |
| 250 | UINT32 Result; |
| 251 | Result = 0; |
| 252 | if ( pConfig->StdHeader.CALLBACK.CalloutPtr == NULL ) return Result; |
| 253 | Result = (pConfig->StdHeader.CALLBACK.CalloutPtr) ( Func, Data, pConfig); |
| 254 | |
| 255 | return Result; |
| 256 | } |
| 257 | |
| 258 | |