Angel Pons | 2e8a4b0 | 2020-04-05 13:22:54 +0200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
Stefan Reinauer | b7ecf6d | 2013-03-13 17:13:32 -0700 | [diff] [blame] | 2 | |
| 3 | #include <stdint.h> |
Stefan Reinauer | b7ecf6d | 2013-03-13 17:13:32 -0700 | [diff] [blame] | 4 | #include <console/console.h> |
Edward O'Callaghan | 77757c2 | 2015-01-04 21:33:39 +1100 | [diff] [blame] | 5 | #include <northbridge/intel/sandybridge/sandybridge.h> |
| 6 | #include <northbridge/intel/sandybridge/raminit.h> |
| 7 | #include <southbridge/intel/bd82x6x/pch.h> |
Patrick Rudolph | e8e66f4 | 2016-02-06 17:42:42 +0100 | [diff] [blame] | 8 | #include <southbridge/intel/common/gpio.h> |
Kyösti Mälkki | 926a8d1 | 2014-04-27 22:17:22 +0300 | [diff] [blame] | 9 | #include <bootmode.h> |
Stefan Reinauer | b7ecf6d | 2013-03-13 17:13:32 -0700 | [diff] [blame] | 10 | #include <ec/quanta/it8518/ec.h> |
| 11 | #include "ec.h" |
| 12 | #include "onboard.h" |
| 13 | |
Arthur Heymans | 9c53834 | 2019-11-12 16:42:33 +0100 | [diff] [blame] | 14 | void mainboard_late_rcba_config(void) |
Stefan Reinauer | b7ecf6d | 2013-03-13 17:13:32 -0700 | [diff] [blame] | 15 | { |
Kyösti Mälkki | 6f49906 | 2015-06-06 11:52:24 +0300 | [diff] [blame] | 16 | /* |
| 17 | * GFX INTA -> PIRQA (MSI) |
| 18 | * D20IP_XHCI XHCI INTA -> PIRQD (MSI) |
| 19 | * D26IP_E2P EHCI #2 INTA -> PIRQF |
| 20 | * D27IP_ZIP HDA INTA -> PIRQA (MSI) |
| 21 | * D28IP_P2IP WLAN INTA -> PIRQD |
| 22 | * D28IP_P3IP Card Reader INTB -> PIRQE |
| 23 | * D28IP_P6IP LAN INTC -> PIRQB |
| 24 | * D29IP_E1P EHCI #1 INTA -> PIRQD |
| 25 | * D31IP_SIP SATA INTA -> PIRQB (MSI) |
| 26 | * D31IP_SMIP SMBUS INTB -> PIRQH |
| 27 | */ |
| 28 | |
| 29 | /* Device interrupt pin register (board specific) */ |
| 30 | RCBA32(D31IP) = (NOINT << D31IP_TTIP) | (NOINT << D31IP_SIP2) | |
| 31 | (INTB << D31IP_SMIP) | (INTA << D31IP_SIP); |
| 32 | RCBA32(D30IP) = (NOINT << D30IP_PIP); |
| 33 | RCBA32(D29IP) = (INTA << D29IP_E1P); |
| 34 | RCBA32(D28IP) = (NOINT << D28IP_P1IP) | (INTA << D28IP_P2IP) | |
| 35 | (INTB << D28IP_P3IP) | (NOINT << D28IP_P4IP) | |
| 36 | (NOINT << D28IP_P5IP) | (INTC << D28IP_P6IP) | |
| 37 | (NOINT << D28IP_P7IP) | (NOINT << D28IP_P8IP); |
| 38 | RCBA32(D27IP) = (INTA << D27IP_ZIP); |
| 39 | RCBA32(D26IP) = (INTA << D26IP_E2P); |
| 40 | RCBA32(D25IP) = (NOINT << D25IP_LIP); |
| 41 | RCBA32(D22IP) = (NOINT << D22IP_MEI1IP); |
| 42 | RCBA32(D20IP) = (INTA << D20IP_XHCIIP); |
| 43 | |
| 44 | /* Device interrupt route registers */ |
| 45 | DIR_ROUTE(D31IR, PIRQB, PIRQH, PIRQA, PIRQC); |
| 46 | DIR_ROUTE(D29IR, PIRQD, PIRQE, PIRQF, PIRQG); |
| 47 | DIR_ROUTE(D28IR, PIRQD, PIRQE, PIRQB, PIRQC); |
| 48 | DIR_ROUTE(D27IR, PIRQA, PIRQB, PIRQC, PIRQD); |
| 49 | DIR_ROUTE(D26IR, PIRQF, PIRQB, PIRQC, PIRQD); |
| 50 | DIR_ROUTE(D25IR, PIRQA, PIRQB, PIRQC, PIRQD); |
| 51 | DIR_ROUTE(D22IR, PIRQA, PIRQB, PIRQC, PIRQD); |
| 52 | DIR_ROUTE(D20IR, PIRQD, PIRQE, PIRQF, PIRQG); |
Stefan Reinauer | b7ecf6d | 2013-03-13 17:13:32 -0700 | [diff] [blame] | 53 | } |
| 54 | |
Stefan Reinauer | b7ecf6d | 2013-03-13 17:13:32 -0700 | [diff] [blame] | 55 | /* |
| 56 | * The Stout EC needs to be reset to RW mode. It is important that |
| 57 | * the RTC_PWR_STS is not set until ramstage EC init. |
| 58 | */ |
| 59 | static void early_ec_init(void) |
| 60 | { |
| 61 | u8 ec_status = ec_read(EC_STATUS_REG); |
Furquan Shaikh | 0325dc6 | 2016-07-25 13:02:36 -0700 | [diff] [blame] | 62 | int rec_mode = get_recovery_mode_switch(); |
Stefan Reinauer | b7ecf6d | 2013-03-13 17:13:32 -0700 | [diff] [blame] | 63 | |
| 64 | if (((ec_status & 0x3) == EC_IN_RO_MODE) || |
| 65 | ((ec_status & 0x3) == EC_IN_RECOVERY_MODE)) { |
Stefan Reinauer | b7ecf6d | 2013-03-13 17:13:32 -0700 | [diff] [blame] | 66 | printk(BIOS_DEBUG, "EC Cold Boot Detected\n"); |
| 67 | if (!rec_mode) { |
| 68 | /* |
| 69 | * Tell EC to exit RO mode |
| 70 | */ |
| 71 | printk(BIOS_DEBUG, "EC will exit RO mode and boot normally\n"); |
| 72 | ec_write_cmd(EC_CMD_EXIT_BOOT_BLOCK); |
| 73 | die("wait for ec to reset"); |
| 74 | } |
| 75 | } else { |
| 76 | printk(BIOS_DEBUG, "EC Warm Boot Detected\n"); |
| 77 | ec_write_cmd(EC_CMD_WARM_RESET); |
| 78 | } |
| 79 | } |
| 80 | |
Vladimir Serbinenko | ffbb3c0 | 2016-02-10 01:36:25 +0100 | [diff] [blame] | 81 | void mainboard_fill_pei_data(struct pei_data *pei_data) |
Stefan Reinauer | b7ecf6d | 2013-03-13 17:13:32 -0700 | [diff] [blame] | 82 | { |
Keith Hui | 7039edd | 2023-07-21 10:12:05 -0400 | [diff] [blame] | 83 | /* TODO: Confirm if nortbridge_fill_pei_data() gets .system_type right (should be 0) */ |
Vladimir Serbinenko | ffbb3c0 | 2016-02-10 01:36:25 +0100 | [diff] [blame] | 84 | } |
Stefan Reinauer | b7ecf6d | 2013-03-13 17:13:32 -0700 | [diff] [blame] | 85 | |
Vladimir Serbinenko | ffbb3c0 | 2016-02-10 01:36:25 +0100 | [diff] [blame] | 86 | void mainboard_early_init(int s3resume) |
| 87 | { |
Stefan Reinauer | b7ecf6d | 2013-03-13 17:13:32 -0700 | [diff] [blame] | 88 | /* Do ec reset as early as possible, but skip it on S3 resume */ |
Vladimir Serbinenko | ffbb3c0 | 2016-02-10 01:36:25 +0100 | [diff] [blame] | 89 | if (!s3resume) { |
Stefan Reinauer | b7ecf6d | 2013-03-13 17:13:32 -0700 | [diff] [blame] | 90 | early_ec_init(); |
Stefan Reinauer | b7ecf6d | 2013-03-13 17:13:32 -0700 | [diff] [blame] | 91 | } |
Vladimir Serbinenko | ffbb3c0 | 2016-02-10 01:36:25 +0100 | [diff] [blame] | 92 | } |
Vladimir Serbinenko | c845b43 | 2014-09-05 03:37:44 +0200 | [diff] [blame] | 93 | |
Vladimir Serbinenko | f004b6b | 2016-02-10 02:42:16 +0100 | [diff] [blame] | 94 | const struct southbridge_usb_port mainboard_usb_ports[] = { |
Elyes HAOUAS | 44f558e | 2020-02-24 13:26:04 +0100 | [diff] [blame] | 95 | /* enabled USB oc pin length */ |
Elyes HAOUAS | 48a0129 | 2016-09-29 18:57:56 +0200 | [diff] [blame] | 96 | {1, 0, 0}, /* P0: USB 3.0 1 (OC0) */ |
| 97 | {1, 0, 0}, /* P1: USB 3.0 2 (OC0) */ |
| 98 | {0, 0, 0}, /* P2: Empty */ |
| 99 | {1, 0, -1}, /* P3: Camera (no OC) */ |
| 100 | {1, 0, -1}, /* P4: WLAN (no OC) */ |
| 101 | {1, 0, -1}, /* P5: WWAN (no OC) */ |
| 102 | {0, 0, 0}, /* P6: Empty */ |
| 103 | {0, 0, 0}, /* P7: Empty */ |
| 104 | {0, 0, 0}, /* P8: Empty */ |
| 105 | {1, 0, 4}, /* P9: USB 2.0 (AUO4) (OC4) */ |
| 106 | {0, 0, 0}, /* P10: Empty */ |
| 107 | {0, 0, 0}, /* P11: Empty */ |
| 108 | {0, 0, 0}, /* P12: Empty */ |
| 109 | {1, 0, -1}, /* P13: Bluetooth (no OC) */ |
Vladimir Serbinenko | f004b6b | 2016-02-10 02:42:16 +0100 | [diff] [blame] | 110 | }; |