blob: f2aa34c26e55c1255be90790076922d975e373c0 [file] [log] [blame]
Martin Rothebace9f2018-05-26 18:56:17 -06001/*
2 * This file is part of the coreboot project.
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; version 2 of the License.
7 *
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 */
13
Eric Biedermandbec2d42004-10-21 10:44:08 +000014#include "amd8111_smbus.h"
15
Eric Biederman3d3f4382003-07-12 01:48:30 +000016#define SMBUS_IO_BASE 0x0f00
Eric Biederman05f26fc2003-06-11 21:55:00 +000017
Eric Biederman05f26fc2003-06-11 21:55:00 +000018static void enable_smbus(void)
19{
Antonello Dettoribf4224c2016-09-03 10:45:33 +020020 pci_devfn_t dev;
Marc Jones0da5cde2007-12-19 01:36:46 +000021 uint8_t enable;
22
Eric Biederman540ae012003-06-12 17:55:54 +000023 dev = pci_locate_device(PCI_ID(0x1022, 0x746b), 0);
24 if (dev == PCI_DEV_INVALID) {
Stefan Reinauer64ed2b72010-03-31 14:47:43 +000025 die("SMBUS controller not found\n");
Eric Biederman05f26fc2003-06-11 21:55:00 +000026 }
Marc Jones0da5cde2007-12-19 01:36:46 +000027
Eric Biederman540ae012003-06-12 17:55:54 +000028 pci_write_config32(dev, 0x58, SMBUS_IO_BASE | 1);
29 enable = pci_read_config8(dev, 0x41);
30 pci_write_config8(dev, 0x41, enable | (1 << 7));
Marc Jones0da5cde2007-12-19 01:36:46 +000031
32 /* check that we can see the smbus controller I/O. */
33 if (inw(SMBUS_IO_BASE)==0xFF){
34 die("SMBUS controller I/O not found\n");
35 }
36
Eric Biederman83b991a2003-10-11 06:20:25 +000037 /* clear any lingering errors, so the transaction will run */
38 outw(inw(SMBUS_IO_BASE + SMBGSTATUS), SMBUS_IO_BASE + SMBGSTATUS);
Stefan Reinauer5ab52dd2015-01-05 13:01:01 -080039 printk(BIOS_SPEW, "SMBus controller enabled\n");
Eric Biederman05f26fc2003-06-11 21:55:00 +000040}
41
Stefan Reinauer467a0652010-04-25 14:37:18 +000042static inline int smbus_recv_byte(unsigned device)
Eric Biederman05f26fc2003-06-11 21:55:00 +000043{
Eric Biedermandbec2d42004-10-21 10:44:08 +000044 return do_smbus_recv_byte(SMBUS_IO_BASE, device);
Eric Biederman05f26fc2003-06-11 21:55:00 +000045}
46
Stefan Reinauer467a0652010-04-25 14:37:18 +000047static inline int smbus_send_byte(unsigned device, unsigned char val)
Eric Biederman05f26fc2003-06-11 21:55:00 +000048{
Eric Biedermandbec2d42004-10-21 10:44:08 +000049 return do_smbus_send_byte(SMBUS_IO_BASE, device, val);
Eric Biederman05f26fc2003-06-11 21:55:00 +000050}
51
Stefan Reinauer467a0652010-04-25 14:37:18 +000052static inline int smbus_read_byte(unsigned device, unsigned address)
Eric Biederman05f26fc2003-06-11 21:55:00 +000053{
Eric Biedermandbec2d42004-10-21 10:44:08 +000054 return do_smbus_read_byte(SMBUS_IO_BASE, device, address);
Eric Biederman05f26fc2003-06-11 21:55:00 +000055}
Stefan Reinauera84c6f82003-10-06 15:04:41 +000056
Stefan Reinauer467a0652010-04-25 14:37:18 +000057static inline int smbus_write_byte(unsigned device, unsigned address, unsigned char val)
Stefan Reinauera84c6f82003-10-06 15:04:41 +000058{
Eric Biedermandbec2d42004-10-21 10:44:08 +000059 return do_smbus_write_byte(SMBUS_IO_BASE, device, address, val);
Stefan Reinauera84c6f82003-10-06 15:04:41 +000060}
Stefan Reinauer467a0652010-04-25 14:37:18 +000061
Oskar Enoksson9bfa1c82011-10-14 02:16:48 +020062static inline int smbus_block_read(unsigned device, unsigned cmd, u8 bytes, u8 *buf)
63{
64 return do_smbus_block_read(SMBUS_IO_BASE, device, cmd, bytes, buf);
65}
66
67static inline int smbus_block_write(unsigned device, unsigned cmd, u8 bytes, const u8 *buf)
68{
69 return do_smbus_block_write(SMBUS_IO_BASE, device, cmd, bytes, buf);
70}