blob: e7bfe5d26adae5dcdae41caecb68837c92091cdb [file] [log] [blame]
Patrick Georgi2efc8802012-11-06 11:03:53 +01001##
2## This file is part of the coreboot project.
3##
4## Copyright (C) 2007-2009 coresystems GmbH
5##
6## This program is free software; you can redistribute it and/or modify
7## it under the terms of the GNU General Public License as published by
8## the Free Software Foundation; version 2 of the License.
9##
10## This program is distributed in the hope that it will be useful,
11## but WITHOUT ANY WARRANTY; without even the implied warranty of
12## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13## GNU General Public License for more details.
14##
Patrick Georgi2efc8802012-11-06 11:03:53 +010015
16config NORTHBRIDGE_INTEL_GM45
17 bool
18
19if NORTHBRIDGE_INTEL_GM45
20
21config NORTHBRIDGE_SPECIFIC_OPTIONS # dummy
22 def_bool y
23 select HAVE_DEBUG_RAM_SETUP
Vladimir Serbinenko88010112014-08-16 03:35:33 +020024 select VGA
25 select INTEL_EDID
Vladimir Serbinenkodd2bc3f2014-10-31 09:16:31 +010026 select INTEL_GMA_ACPI
Nico Huber561bebf2017-01-19 16:28:18 +010027 select INTEL_GMA_SSC_ALTERNATE_REF
Arthur Heymans6336d4c2018-01-25 21:38:25 +010028 select PARALLEL_MP
Arthur Heymansbe9533a2019-10-12 14:35:25 +020029 select C_ENVIRONMENT_BOOTBLOCK
Patrick Georgi2efc8802012-11-06 11:03:53 +010030
Martin Roth59ff3402016-02-09 09:06:46 -070031config CBFS_SIZE
32 hex
33 default 0x100000
34
Vladimir Serbinenkod668cce2014-08-10 21:58:23 +020035config VGA_BIOS_ID
36 string
37 default "8086,2a42"
38
Arthur Heymans1dcb2ac2017-05-10 13:11:11 +020039config MMCONF_BASE_ADDRESS
40 hex
41 default 0xf0000000
42
Arthur Heymansc3e9ba02018-04-10 16:12:29 +020043config SMM_RESERVED_SIZE
44 hex
45 default 0x100000
46
Patrick Georgi2efc8802012-11-06 11:03:53 +010047endif