blob: 804a47a44876e958ee3a79c46acf7f5c58209727 [file] [log] [blame]
Angel Ponse67ab182020-04-04 18:51:11 +02001/* SPDX-License-Identifier: GPL-2.0-only */
2/* This file is part of the coreboot project. */
Tristan Shieh0eb92df2018-06-08 18:21:45 +08003
4#include <device/device.h>
Tristan Shieh9315a042018-08-06 13:57:50 +08005#include <soc/emi.h>
Yanjie Jiang64dea2e2019-05-07 10:31:07 +08006#include <soc/md_ctrl.h>
Tristan Shieh0eb92df2018-06-08 18:21:45 +08007#include <soc/mmu_operations.h>
Weiyi Lue78d1402019-08-05 17:45:24 +08008#include <soc/rtc.h>
Erin Lobbeed7a2019-07-16 10:08:33 +08009#include <soc/sspm.h>
Tristan Shieh9315a042018-08-06 13:57:50 +080010#include <symbols.h>
11
Tristan Shieh9315a042018-08-06 13:57:50 +080012static void soc_read_resources(struct device *dev)
13{
14 ram_resource(dev, 0, (uintptr_t)_dram / KiB, sdram_size() / KiB);
15}
Tristan Shieh0eb92df2018-06-08 18:21:45 +080016
17static void soc_init(struct device *dev)
18{
19 mtk_mmu_disable_l2c_sram();
Yanjie Jiang64dea2e2019-05-07 10:31:07 +080020 mtk_md_early_init();
Weiyi Lue78d1402019-08-05 17:45:24 +080021 mt6358_dcxo_disable_unused();
Erin Lobbeed7a2019-07-16 10:08:33 +080022 sspm_init();
Tristan Shieh0eb92df2018-06-08 18:21:45 +080023}
24
25static struct device_operations soc_ops = {
Tristan Shieh9315a042018-08-06 13:57:50 +080026 .read_resources = soc_read_resources,
Tristan Shieh0eb92df2018-06-08 18:21:45 +080027 .init = soc_init,
28};
29
30static void enable_soc_dev(struct device *dev)
31{
32 dev->ops = &soc_ops;
33}
34
35struct chip_operations soc_mediatek_mt8183_ops = {
36 CHIP_NAME("SOC Mediatek MT8183")
37 .enable_dev = enable_soc_dev,
38};