Tristan Shieh | 0eb92df | 2018-06-08 18:21:45 +0800 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
Tristan Shieh | 0eb92df | 2018-06-08 18:21:45 +0800 | [diff] [blame] | 4 | * |
| 5 | * This program is free software; you can redistribute it and/or modify |
| 6 | * it under the terms of the GNU General Public License as published by |
| 7 | * the Free Software Foundation; version 2 of the License. |
| 8 | * |
| 9 | * This program is distributed in the hope that it will be useful, |
| 10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 12 | * GNU General Public License for more details. |
| 13 | */ |
| 14 | |
| 15 | #include <device/device.h> |
Tristan Shieh | 9315a04 | 2018-08-06 13:57:50 +0800 | [diff] [blame] | 16 | #include <soc/emi.h> |
Yanjie Jiang | 64dea2e | 2019-05-07 10:31:07 +0800 | [diff] [blame] | 17 | #include <soc/md_ctrl.h> |
Tristan Shieh | 0eb92df | 2018-06-08 18:21:45 +0800 | [diff] [blame] | 18 | #include <soc/mmu_operations.h> |
Weiyi Lu | e78d140 | 2019-08-05 17:45:24 +0800 | [diff] [blame] | 19 | #include <soc/rtc.h> |
Erin Lo | bbeed7a | 2019-07-16 10:08:33 +0800 | [diff] [blame] | 20 | #include <soc/sspm.h> |
Tristan Shieh | 9315a04 | 2018-08-06 13:57:50 +0800 | [diff] [blame] | 21 | #include <symbols.h> |
| 22 | |
Tristan Shieh | 9315a04 | 2018-08-06 13:57:50 +0800 | [diff] [blame] | 23 | static void soc_read_resources(struct device *dev) |
| 24 | { |
| 25 | ram_resource(dev, 0, (uintptr_t)_dram / KiB, sdram_size() / KiB); |
| 26 | } |
Tristan Shieh | 0eb92df | 2018-06-08 18:21:45 +0800 | [diff] [blame] | 27 | |
| 28 | static void soc_init(struct device *dev) |
| 29 | { |
| 30 | mtk_mmu_disable_l2c_sram(); |
Yanjie Jiang | 64dea2e | 2019-05-07 10:31:07 +0800 | [diff] [blame] | 31 | mtk_md_early_init(); |
Weiyi Lu | e78d140 | 2019-08-05 17:45:24 +0800 | [diff] [blame] | 32 | mt6358_dcxo_disable_unused(); |
Erin Lo | bbeed7a | 2019-07-16 10:08:33 +0800 | [diff] [blame] | 33 | sspm_init(); |
Tristan Shieh | 0eb92df | 2018-06-08 18:21:45 +0800 | [diff] [blame] | 34 | } |
| 35 | |
| 36 | static struct device_operations soc_ops = { |
Tristan Shieh | 9315a04 | 2018-08-06 13:57:50 +0800 | [diff] [blame] | 37 | .read_resources = soc_read_resources, |
Tristan Shieh | 0eb92df | 2018-06-08 18:21:45 +0800 | [diff] [blame] | 38 | .init = soc_init, |
| 39 | }; |
| 40 | |
| 41 | static void enable_soc_dev(struct device *dev) |
| 42 | { |
| 43 | dev->ops = &soc_ops; |
| 44 | } |
| 45 | |
| 46 | struct chip_operations soc_mediatek_mt8183_ops = { |
| 47 | CHIP_NAME("SOC Mediatek MT8183") |
| 48 | .enable_dev = enable_soc_dev, |
| 49 | }; |