Nicolas Reinecke | 572795b | 2014-12-29 19:57:29 +0100 | [diff] [blame] | 1 | chip northbridge/intel/sandybridge |
Peter Lemenkov | 18f8885 | 2019-10-23 22:07:58 +0200 | [diff] [blame] | 2 | # IGD Displays |
Nico Huber | b0b25c8 | 2020-03-21 20:35:12 +0100 | [diff] [blame] | 3 | register "gfx" = "GMA_STATIC_DISPLAYS(1)" |
Nicolas Reinecke | 572795b | 2014-12-29 19:57:29 +0100 | [diff] [blame] | 4 | |
| 5 | # Enable DisplayPort Hotplug with 6ms pulse |
| 6 | register "gpu_dp_d_hotplug" = "0x06" |
| 7 | |
| 8 | # Enable Panel as LVDS and configure power delays |
Angel Pons | dc0c081 | 2020-09-02 19:17:30 +0200 | [diff] [blame] | 9 | register "gpu_panel_port_select" = "PANEL_PORT_LVDS" |
Nicolas Reinecke | 572795b | 2014-12-29 19:57:29 +0100 | [diff] [blame] | 10 | register "gpu_panel_power_cycle_delay" = "1" |
| 11 | register "gpu_panel_power_up_delay" = "300" # T1+T2: 30ms |
| 12 | register "gpu_panel_power_down_delay" = "300" # T5+T6: 30ms |
| 13 | register "gpu_panel_power_backlight_on_delay" = "2000" # T3: 200ms |
| 14 | register "gpu_panel_power_backlight_off_delay" = "2000" # T4: 200ms |
Nicolas Reinecke | 572795b | 2014-12-29 19:57:29 +0100 | [diff] [blame] | 15 | register "gpu_cpu_backlight" = "0x1155" |
| 16 | register "gpu_pch_backlight" = "0x06100610" |
| 17 | |
Keith Hui | 45e4ab4 | 2023-07-22 12:49:05 -0400 | [diff] [blame] | 18 | register "spd_addresses" = "{0x50, 0, 0x51, 0}" |
Patrick Rudolph | e4b2f3a | 2024-04-28 11:18:43 +0200 | [diff] [blame^] | 19 | chip cpu/intel/model_206ax |
| 20 | # Values obtained from vendor BIOS |
| 21 | register "pp0_psi[VR12_PSI2]" = "{VR12_ALL_PHASES, 5}" |
| 22 | register "pp0_psi[VR12_PSI3]" = "{VR12_ALL_PHASES, 1}" |
| 23 | register "pp1_psi[VR12_PSI2]" = "{VR12_ALL_PHASES, 5}" |
| 24 | register "pp1_psi[VR12_PSI3]" = "{VR12_ALL_PHASES, 1}" |
| 25 | device cpu_cluster 0 on end |
| 26 | end |
Nicolas Reinecke | 572795b | 2014-12-29 19:57:29 +0100 | [diff] [blame] | 27 | device domain 0 on |
Peter Lemenkov | 5ee7e47 | 2019-11-27 12:17:26 +0100 | [diff] [blame] | 28 | subsystemid 0x17aa 0x21d2 inherit |
| 29 | |
Arthur Heymans | b5df65a | 2022-11-12 14:51:49 +0100 | [diff] [blame] | 30 | device ref host_bridge on end # host bridge |
| 31 | device ref peg10 on end # NVIDIA Copcie_rporation GF119M [NVS 4200M] |
| 32 | device ref igd on |
Nicolas Reinecke | 572795b | 2014-12-29 19:57:29 +0100 | [diff] [blame] | 33 | subsystemid 0x17aa 0x21d3 |
| 34 | end # Integrated Graphics Controller |
| 35 | |
| 36 | chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH |
| 37 | # GPI routing |
| 38 | # 0 No effect (default) |
| 39 | # 1 SMI# (if corresponding ALT_GPI_SMI_EN bit is also set) |
| 40 | # 2 SCI (if corresponding GPIO_EN bit is also set) |
| 41 | register "alt_gp_smi_en" = "0x0000" |
| 42 | register "gpi1_routing" = "2" |
Nicolas Reinecke | b0922f0 | 2015-02-01 02:53:35 +0100 | [diff] [blame] | 43 | register "gpi13_routing" = "2" |
Nicolas Reinecke | 572795b | 2014-12-29 19:57:29 +0100 | [diff] [blame] | 44 | |
| 45 | # Enable SATA ports 0 (HDD bay) & 1 (ODD bay) & 2 (mSATA) & 4 (dock) |
| 46 | register "sata_port_map" = "0x17" |
| 47 | # Set max SATA speed to 6.0 Gb/s |
| 48 | register "sata_interface_speed_support" = "0x3" |
| 49 | |
| 50 | register "gen1_dec" = "0x7c1601" |
| 51 | register "gen2_dec" = "0x0c15e1" |
| 52 | register "gen4_dec" = "0x0c06a1" |
| 53 | |
| 54 | register "pcie_hotplug_map" = "{ 0, 0, 0, 1, 0, 0, 0, 0 }" |
| 55 | |
| 56 | # Enable zero-based linear PCIe root port functions |
Angel Pons | af4bd56 | 2021-12-28 13:05:56 +0100 | [diff] [blame] | 57 | register "pcie_port_coalesce" = "true" |
Nicolas Reinecke | 572795b | 2014-12-29 19:57:29 +0100 | [diff] [blame] | 58 | |
Peter Lemenkov | 18f8885 | 2019-10-23 22:07:58 +0200 | [diff] [blame] | 59 | # device specific SPI configuration |
Patrick Rudolph | c670a41 | 2017-04-28 17:28:32 +0200 | [diff] [blame] | 60 | register "spi_uvscc" = "0x2005" |
| 61 | register "spi_lvscc" = "0x2005" |
| 62 | |
Arthur Heymans | b5df65a | 2022-11-12 14:51:49 +0100 | [diff] [blame] | 63 | device ref mei1 on end # Management Engine Interface 1 |
| 64 | device ref mei2 off end # Management Engine Interface 2 |
| 65 | device ref me_ide_r off end # Management Engine IDE-R |
| 66 | device ref me_kt off end # Management Engine KT |
| 67 | device ref gbe on |
Nicolas Reinecke | 572795b | 2014-12-29 19:57:29 +0100 | [diff] [blame] | 68 | subsystemid 0x17aa 0x21ce |
| 69 | end # Intel Gigabit Ethernet |
Arthur Heymans | b5df65a | 2022-11-12 14:51:49 +0100 | [diff] [blame] | 70 | device ref ehci2 on end # USB Enhanced Host Controller #2 |
| 71 | device ref hda on end # High Definition Audio Controller |
| 72 | device ref pcie_rp1 off end # PCIe Port #1 |
| 73 | device ref pcie_rp2 on end # PCIe Port #2 Integrated Wireless LAN |
| 74 | device ref pcie_rp3 off end # PCIe Port #3 |
| 75 | device ref pcie_rp4 on |
Patrick Rudolph | 0521632 | 2019-04-12 16:14:27 +0200 | [diff] [blame] | 76 | smbios_slot_desc "7" "3" "ExpressCard Slot" "8" |
Nicolas Reinecke | 572795b | 2014-12-29 19:57:29 +0100 | [diff] [blame] | 77 | end # PCIe Port #4 ExpressCard |
Arthur Heymans | b5df65a | 2022-11-12 14:51:49 +0100 | [diff] [blame] | 78 | device ref pcie_rp5 on end # PCIe Port #5 NEC Corporation uPD720200A USB 3.0 Host Controller |
| 79 | device ref pcie_rp6 off end # PCIe Port #6 Intel Gigabit Ethernet PHY (not PCIe) |
| 80 | device ref pcie_rp7 off end # PCIe Port #7 |
| 81 | device ref pcie_rp8 off end # PCIe Port #8 |
| 82 | device ref ehci1 on end # USB Enhanced Host Controller #1 |
| 83 | device ref pci_bridge off end # PCI bridge |
| 84 | device ref lpc on |
Nicolas Reinecke | 572795b | 2014-12-29 19:57:29 +0100 | [diff] [blame] | 85 | chip ec/lenovo/pmh7 |
Peter Lemenkov | 5ee7e47 | 2019-11-27 12:17:26 +0100 | [diff] [blame] | 86 | device pnp ff.1 on end # dummy |
Elyes Haouas | af93336 | 2023-03-19 08:01:53 +0100 | [diff] [blame] | 87 | register "backlight_enable" = "true" |
| 88 | register "dock_event_enable" = "true" |
Nicolas Reinecke | 572795b | 2014-12-29 19:57:29 +0100 | [diff] [blame] | 89 | end |
| 90 | |
Philipp Deppenwiese | 3d02b9c | 2015-06-03 23:09:36 +0200 | [diff] [blame] | 91 | chip drivers/pc80/tpm |
| 92 | device pnp 0c31.0 on end |
| 93 | end |
| 94 | |
Nicolas Reinecke | 572795b | 2014-12-29 19:57:29 +0100 | [diff] [blame] | 95 | chip ec/lenovo/h8 |
| 96 | device pnp ff.2 on # dummy |
| 97 | io 0x60 = 0x62 |
| 98 | io 0x62 = 0x66 |
| 99 | io 0x64 = 0x1600 |
| 100 | io 0x66 = 0x1604 |
| 101 | end |
| 102 | |
| 103 | register "config0" = "0xa7" |
| 104 | register "config1" = "0x01" |
| 105 | register "config2" = "0xa0" |
| 106 | register "config3" = "0xe2" |
| 107 | |
| 108 | register "has_keyboard_backlight" = "0" |
| 109 | |
| 110 | register "beepmask0" = "0x02" |
| 111 | register "beepmask1" = "0x86" |
| 112 | register "has_power_management_beeps" = "1" |
| 113 | register "event2_enable" = "0xff" |
| 114 | register "event3_enable" = "0xff" |
| 115 | register "event4_enable" = "0xf0" |
| 116 | register "event5_enable" = "0x3c" |
| 117 | register "event6_enable" = "0x00" |
| 118 | register "event7_enable" = "0xa1" |
| 119 | register "event8_enable" = "0x7b" |
| 120 | register "event9_enable" = "0xff" |
| 121 | register "eventa_enable" = "0x00" |
| 122 | register "eventb_enable" = "0x00" |
| 123 | register "eventc_enable" = "0xff" |
| 124 | register "eventd_enable" = "0xff" |
| 125 | register "evente_enable" = "0x0d" |
Patrick Rudolph | b77eec8 | 2017-05-21 09:20:39 +0200 | [diff] [blame] | 126 | |
| 127 | register "has_bdc_detection" = "1" |
| 128 | register "bdc_gpio_num" = "54" |
| 129 | register "bdc_gpio_lvl" = "0" |
Nicolas Reinecke | 572795b | 2014-12-29 19:57:29 +0100 | [diff] [blame] | 130 | end |
Patrick Rudolph | db27e338 | 2017-07-27 18:00:59 +0200 | [diff] [blame] | 131 | chip drivers/lenovo/hybrid_graphics |
| 132 | device pnp ff.f on end # dummy |
| 133 | |
| 134 | register "detect_gpio" = "21" |
| 135 | |
| 136 | register "has_panel_hybrid_gpio" = "1" |
| 137 | register "panel_hybrid_gpio" = "52" |
| 138 | register "panel_integrated_lvl" = "1" |
| 139 | |
| 140 | register "has_backlight_gpio" = "0" |
| 141 | register "has_dgpu_power_gpio" = "0" |
| 142 | |
| 143 | register "has_thinker1" = "1" |
| 144 | end |
Nicolas Reinecke | 572795b | 2014-12-29 19:57:29 +0100 | [diff] [blame] | 145 | end # LPC Controller |
Arthur Heymans | b5df65a | 2022-11-12 14:51:49 +0100 | [diff] [blame] | 146 | device ref sata1 on end # 6 port SATA AHCI Controller |
| 147 | device ref smbus on |
Nicolas Reinecke | 572795b | 2014-12-29 19:57:29 +0100 | [diff] [blame] | 148 | # eeprom, 8 virtual devices, same chip |
| 149 | chip drivers/i2c/at24rf08c |
| 150 | device i2c 54 on end |
| 151 | device i2c 55 on end |
| 152 | device i2c 56 on end |
| 153 | device i2c 57 on end |
| 154 | device i2c 5c on end |
| 155 | device i2c 5d on end |
| 156 | device i2c 5e on end |
| 157 | device i2c 5f on end |
| 158 | end |
| 159 | end # SMBus Controller |
Arthur Heymans | b5df65a | 2022-11-12 14:51:49 +0100 | [diff] [blame] | 160 | device ref sata2 off end # SATA Controller 2 |
| 161 | device ref thermal on end # Thermal |
Nicolas Reinecke | 572795b | 2014-12-29 19:57:29 +0100 | [diff] [blame] | 162 | end |
| 163 | end |
| 164 | end |