blob: c91b04e9199569f247407bfd265b0db17c52c5fd [file] [log] [blame]
Nicolas Reinecke572795b2014-12-29 19:57:29 +01001chip northbridge/intel/sandybridge
Vladimir Serbinenkodd2bc3f2014-10-31 09:16:31 +01002 register "gfx.ndid" = "3"
3 register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005 }"
Nicolas Reinecke572795b2014-12-29 19:57:29 +01004
5 # Enable DisplayPort Hotplug with 6ms pulse
6 register "gpu_dp_d_hotplug" = "0x06"
7
8 # Enable Panel as LVDS and configure power delays
9 register "gpu_panel_port_select" = "0" # LVDS
10 register "gpu_panel_power_cycle_delay" = "1"
11 register "gpu_panel_power_up_delay" = "300" # T1+T2: 30ms
12 register "gpu_panel_power_down_delay" = "300" # T5+T6: 30ms
13 register "gpu_panel_power_backlight_on_delay" = "2000" # T3: 200ms
14 register "gpu_panel_power_backlight_off_delay" = "2000" # T4: 200ms
15 register "gfx.use_spread_spectrum_clock" = "1"
Nicolas Reinecke572795b2014-12-29 19:57:29 +010016 register "gfx.link_frequency_270_mhz" = "1"
Nicolas Reinecke572795b2014-12-29 19:57:29 +010017 register "gpu_cpu_backlight" = "0x1155"
18 register "gpu_pch_backlight" = "0x06100610"
19
20 device cpu_cluster 0 on
Nicolas Reinecke572795b2014-12-29 19:57:29 +010021 chip cpu/intel/model_206ax
22 # Magic APIC ID to locate this chip
Arthur Heymans7e6946a2019-01-21 17:55:02 +010023 device lapic 0x0 on end
Arthur Heymansb3f23232019-01-21 17:48:55 +010024 device lapic 0xacac off end
Nicolas Reinecke572795b2014-12-29 19:57:29 +010025
Nicolas Reinecke572795b2014-12-29 19:57:29 +010026 register "c1_acpower" = "1" # ACPI(C1) = MWAIT(C1)
27 register "c2_acpower" = "3" # ACPI(C2) = MWAIT(C3)
28 register "c3_acpower" = "5" # ACPI(C3) = MWAIT(C7)
29
30 register "c1_battery" = "1" # ACPI(C1) = MWAIT(C1)
31 register "c2_battery" = "3" # ACPI(C2) = MWAIT(C3)
32 register "c3_battery" = "5" # ACPI(C3) = MWAIT(C7)
33 end
34 end
35
Patrick Rudolph266a1f72016-06-09 18:13:34 +020036 register "pci_mmio_size" = "2048"
37
Nicolas Reinecke572795b2014-12-29 19:57:29 +010038 device domain 0 on
Peter Lemenkov5ee7e472019-11-27 12:17:26 +010039 subsystemid 0x17aa 0x21d2 inherit
40
41 device pci 00.0 on end # host bridge
Patrick Rudolph830fdc72016-04-21 07:15:14 +020042 device pci 01.0 on end # NVIDIA Corporation GF119M [NVS 4200M]
Nicolas Reinecke572795b2014-12-29 19:57:29 +010043 device pci 02.0 on
44 subsystemid 0x17aa 0x21d3
45 end # Integrated Graphics Controller
46
47 chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH
48 # GPI routing
49 # 0 No effect (default)
50 # 1 SMI# (if corresponding ALT_GPI_SMI_EN bit is also set)
51 # 2 SCI (if corresponding GPIO_EN bit is also set)
52 register "alt_gp_smi_en" = "0x0000"
53 register "gpi1_routing" = "2"
Nicolas Reineckeb0922f02015-02-01 02:53:35 +010054 register "gpi13_routing" = "2"
Nicolas Reinecke572795b2014-12-29 19:57:29 +010055
56 # Enable SATA ports 0 (HDD bay) & 1 (ODD bay) & 2 (mSATA) & 4 (dock)
57 register "sata_port_map" = "0x17"
58 # Set max SATA speed to 6.0 Gb/s
59 register "sata_interface_speed_support" = "0x3"
60
61 register "gen1_dec" = "0x7c1601"
62 register "gen2_dec" = "0x0c15e1"
63 register "gen4_dec" = "0x0c06a1"
64
65 register "pcie_hotplug_map" = "{ 0, 0, 0, 1, 0, 0, 0, 0 }"
66
67 # Enable zero-based linear PCIe root port functions
68 register "pcie_port_coalesce" = "1"
69
70 register "c2_latency" = "101" # c2 not supported
Nicolas Reinecke572795b2014-12-29 19:57:29 +010071
Patrick Rudolphc670a412017-04-28 17:28:32 +020072 register "spi_uvscc" = "0x2005"
73 register "spi_lvscc" = "0x2005"
74
Nicolas Reinecke572795b2014-12-29 19:57:29 +010075 device pci 16.0 off end # Management Engine Interface 1
76 device pci 16.1 off end # Management Engine Interface 2
77 device pci 16.2 off end # Management Engine IDE-R
78 device pci 16.3 off end # Management Engine KT
79 device pci 19.0 on
80 subsystemid 0x17aa 0x21ce
81 end # Intel Gigabit Ethernet
Peter Lemenkov5ee7e472019-11-27 12:17:26 +010082 device pci 1a.0 on end # USB Enhanced Host Controller #2
83 device pci 1b.0 on end # High Definition Audio Controller
Nicolas Reinecke572795b2014-12-29 19:57:29 +010084 device pci 1c.0 off end # PCIe Port #1
Peter Lemenkov5ee7e472019-11-27 12:17:26 +010085 device pci 1c.1 on end # PCIe Port #2 Integrated Wireless LAN
Nicolas Reinecke572795b2014-12-29 19:57:29 +010086 device pci 1c.2 off end # PCIe Port #3
87 device pci 1c.3 on
Patrick Rudolph05216322019-04-12 16:14:27 +020088 smbios_slot_desc "7" "3" "ExpressCard Slot" "8"
Nicolas Reinecke572795b2014-12-29 19:57:29 +010089 end # PCIe Port #4 ExpressCard
90 device pci 1c.4 off end # PCIe Port #5
91 device pci 1c.5 off end # PCIe Port #6 Intel Gigabit Ethernet PHY (not PCIe)
Peter Lemenkov5ee7e472019-11-27 12:17:26 +010092 device pci 1c.6 on end # PCIe Port #7 NEC Corporation uPD720200A USB 3.0 Host Controller
Nicolas Reinecke572795b2014-12-29 19:57:29 +010093 device pci 1c.7 off end # PCIe Port #8
Peter Lemenkov5ee7e472019-11-27 12:17:26 +010094 device pci 1d.0 on end # USB Enhanced Host Controller #1
Nicolas Reinecke572795b2014-12-29 19:57:29 +010095 device pci 1e.0 off end # PCI bridge
96 device pci 1f.0 on
Nicolas Reinecke572795b2014-12-29 19:57:29 +010097 chip ec/lenovo/pmh7
Peter Lemenkov5ee7e472019-11-27 12:17:26 +010098 device pnp ff.1 on end # dummy
Nicolas Reinecke572795b2014-12-29 19:57:29 +010099 register "backlight_enable" = "0x01"
100 register "dock_event_enable" = "0x01"
101 end
102
Philipp Deppenwiese3d02b9c2015-06-03 23:09:36 +0200103 chip drivers/pc80/tpm
104 device pnp 0c31.0 on end
105 end
106
Nicolas Reinecke572795b2014-12-29 19:57:29 +0100107 chip ec/lenovo/h8
108 device pnp ff.2 on # dummy
109 io 0x60 = 0x62
110 io 0x62 = 0x66
111 io 0x64 = 0x1600
112 io 0x66 = 0x1604
113 end
114
115 register "config0" = "0xa7"
116 register "config1" = "0x01"
117 register "config2" = "0xa0"
118 register "config3" = "0xe2"
119
120 register "has_keyboard_backlight" = "0"
121
122 register "beepmask0" = "0x02"
123 register "beepmask1" = "0x86"
124 register "has_power_management_beeps" = "1"
125 register "event2_enable" = "0xff"
126 register "event3_enable" = "0xff"
127 register "event4_enable" = "0xf0"
128 register "event5_enable" = "0x3c"
129 register "event6_enable" = "0x00"
130 register "event7_enable" = "0xa1"
131 register "event8_enable" = "0x7b"
132 register "event9_enable" = "0xff"
133 register "eventa_enable" = "0x00"
134 register "eventb_enable" = "0x00"
135 register "eventc_enable" = "0xff"
136 register "eventd_enable" = "0xff"
137 register "evente_enable" = "0x0d"
Patrick Rudolphb77eec82017-05-21 09:20:39 +0200138
139 register "has_bdc_detection" = "1"
140 register "bdc_gpio_num" = "54"
141 register "bdc_gpio_lvl" = "0"
Nicolas Reinecke572795b2014-12-29 19:57:29 +0100142 end
Patrick Rudolphdb27e3382017-07-27 18:00:59 +0200143 chip drivers/lenovo/hybrid_graphics
144 device pnp ff.f on end # dummy
145
146 register "detect_gpio" = "21"
147
148 register "has_panel_hybrid_gpio" = "1"
149 register "panel_hybrid_gpio" = "52"
150 register "panel_integrated_lvl" = "1"
151
152 register "has_backlight_gpio" = "0"
153 register "has_dgpu_power_gpio" = "0"
154
155 register "has_thinker1" = "1"
156 end
Nicolas Reinecke572795b2014-12-29 19:57:29 +0100157 end # LPC Controller
Peter Lemenkov5ee7e472019-11-27 12:17:26 +0100158 device pci 1f.2 on end # 6 port SATA AHCI Controller
Nicolas Reinecke572795b2014-12-29 19:57:29 +0100159 device pci 1f.3 on
Nicolas Reinecke572795b2014-12-29 19:57:29 +0100160 # eeprom, 8 virtual devices, same chip
161 chip drivers/i2c/at24rf08c
162 device i2c 54 on end
163 device i2c 55 on end
164 device i2c 56 on end
165 device i2c 57 on end
166 device i2c 5c on end
167 device i2c 5d on end
168 device i2c 5e on end
169 device i2c 5f on end
170 end
171 end # SMBus Controller
172 device pci 1f.5 off end # SATA Controller 2
Peter Lemenkov5ee7e472019-11-27 12:17:26 +0100173 device pci 1f.6 on end # Thermal
Nicolas Reinecke572795b2014-12-29 19:57:29 +0100174 end
175 end
176end