blob: a4fbe11ee81199afa266498006279aa59b1c9a4c [file] [log] [blame]
Patrick Rudolphaae6e9c2016-12-30 17:02:04 +01001chip northbridge/intel/sandybridge
Nico Huberb0b25c82020-03-21 20:35:12 +01002 register "gfx" = "GMA_STATIC_DISPLAYS(0)"
Patrick Rudolphaae6e9c2016-12-30 17:02:04 +01003 register "gpu_cpu_backlight" = "0x00000000"
4 register "gpu_dp_b_hotplug" = "0"
5 register "gpu_dp_c_hotplug" = "0"
6 register "gpu_dp_d_hotplug" = "0"
Angel Ponsdc0c0812020-09-02 19:17:30 +02007 register "gpu_panel_port_select" = "PANEL_PORT_LVDS"
Patrick Rudolphaae6e9c2016-12-30 17:02:04 +01008 register "gpu_panel_power_backlight_off_delay" = "0"
9 register "gpu_panel_power_backlight_on_delay" = "0"
10 register "gpu_panel_power_cycle_delay" = "0"
11 register "gpu_panel_power_down_delay" = "0"
12 register "gpu_panel_power_up_delay" = "0"
13 register "gpu_pch_backlight" = "0x00000000"
Keith Hui45e4ab42023-07-22 12:49:05 -040014 register "spd_addresses" = "{0x50, 0, 0x52, 0}"
Patrick Rudolphe4b2f3a2024-04-28 11:18:43 +020015 chip cpu/intel/model_206ax
16 # Values obtained from vendor BIOS
17 register "pp0_psi[VR12_PSI2]" = "{VR12_ALL_PHASES, 5}"
18 register "pp0_psi[VR12_PSI3]" = "{VR12_ALL_PHASES, 1}"
19 register "pp1_psi[VR12_PSI2]" = "{VR12_ALL_PHASES, 5}"
20 register "pp1_psi[VR12_PSI3]" = "{VR12_ALL_PHASES, 1}"
21 device cpu_cluster 0 on end
22 end
Peter Lemenkov7e128572019-11-27 22:39:52 +010023 device domain 0 on
24 subsystemid 0x17aa 0x21dd inherit
25
Arthur Heymansb5df65a2022-11-12 14:51:49 +010026 device ref host_bridge on end # Host bridge
27 device ref peg10 on end # PCIe Bridge for discrete graphics
28 device ref igd on end # Internal graphics VGA controller
Peter Lemenkov7e128572019-11-27 22:39:52 +010029
Patrick Rudolphaae6e9c2016-12-30 17:02:04 +010030 chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH
Patrick Rudolphaae6e9c2016-12-30 17:02:04 +010031 register "docking_supported" = "1"
32 register "gen1_dec" = "0x007c1611"
33 register "gen2_dec" = "0x00040069"
34 register "gen3_dec" = "0x000c0701"
35 register "gen4_dec" = "0x00000000"
36 register "gpi13_routing" = "2"
37 register "gpi6_routing" = "2"
Patrick Rudolphaae6e9c2016-12-30 17:02:04 +010038 register "pcie_hotplug_map" = "{ 0, 0, 1, 1, 1, 0, 0, 0 }"
Angel Ponsaf4bd562021-12-28 13:05:56 +010039 register "pcie_port_coalesce" = "true"
Patrick Rudolphaae6e9c2016-12-30 17:02:04 +010040 register "sata_interface_speed_support" = "0x3"
41 register "sata_port_map" = "0x3b"
Patrick Rudolphc670a412017-04-28 17:28:32 +020042
43 register "spi_uvscc" = "0"
44 register "spi_lvscc" = "0x2005"
45
Arthur Heymansb5df65a2022-11-12 14:51:49 +010046 device ref mei1 on end # Management Engine Interface 1
47 device ref mei2 off end # Management Engine Interface 2
48 device ref me_ide_r off end # Management Engine IDE-R
49 device ref me_kt off end # Management Engine KT
50 device ref gbe off end # Intel Gigabit Ethernet
51 device ref ehci2 on end # USB2 EHCI #2
Alexander Goncharov893c3ae82023-02-04 15:20:37 +040052 device ref hda on end # High Definition Audio controller
Arthur Heymansb5df65a2022-11-12 14:51:49 +010053 device ref pcie_rp1 on end # PCIe Port #1
54 device ref pcie_rp2 on end # PCIe Port #2
55 device ref pcie_rp3 on end # PCIe Port #3
56 device ref pcie_rp4 on end # PCIe Port #4
57 device ref pcie_rp5 on end # PCIe Port #5
58 device ref pcie_rp6 on end # PCIe Port #6
59 device ref pcie_rp7 off end # PCIe Port #7
60 device ref pcie_rp8 off end # PCIe Port #8
61 device ref ehci1 on end # USB2 EHCI #1
62 device ref pci_bridge off end # PCI bridge
63 device ref lpc on # LPC bridge PCI-LPC bridge
Patrick Rudolphaae6e9c2016-12-30 17:02:04 +010064 chip ec/lenovo/pmh7
Elyes Haouasaf933362023-03-19 08:01:53 +010065 register "backlight_enable" = "true"
66 register "dock_event_enable" = "true"
Peter Lemenkov7e128572019-11-27 22:39:52 +010067 device pnp ff.1 on end # dummy
Patrick Rudolphaae6e9c2016-12-30 17:02:04 +010068 end
69 chip ec/lenovo/h8
Patrick Rudolphc670a412017-04-28 17:28:32 +020070 register "config0" = "0xa7"
71 register "config1" = "0x09"
72 register "config2" = "0xa0"
73 register "config3" = "0xc2"
Patrick Rudolphaae6e9c2016-12-30 17:02:04 +010074
Patrick Rudolphc670a412017-04-28 17:28:32 +020075 register "beepmask0" = "0x00"
76 register "beepmask1" = "0x86"
77 register "has_power_management_beeps" = "0"
78 register "event2_enable" = "0xff"
79 register "event3_enable" = "0xff"
80 register "event4_enable" = "0xff"
81 register "event5_enable" = "0xff"
82 register "event6_enable" = "0xff"
83 register "event7_enable" = "0xff"
84 register "event8_enable" = "0xff"
85 register "event9_enable" = "0xff"
86 register "eventa_enable" = "0xff"
87 register "eventb_enable" = "0xff"
88 register "eventc_enable" = "0xff"
89 register "eventd_enable" = "0xff"
90 register "evente_enable" = "0xff"
Patrick Rudolphaae6e9c2016-12-30 17:02:04 +010091
92 device pnp ff.2 on # dummy
93 io 0x60 = 0x62
94 io 0x62 = 0x66
95 io 0x64 = 0x1600
96 io 0x66 = 0x1604
97 end
98 end
Peter Lemenkov7e128572019-11-27 22:39:52 +010099 end # LPC bridge
Arthur Heymansb5df65a2022-11-12 14:51:49 +0100100 device ref sata1 on end # SATA Controller 1
101 device ref smbus on # SMBus
Patrick Rudolphaae6e9c2016-12-30 17:02:04 +0100102 chip drivers/i2c/at24rf08c # eeprom, 8 virtual devices, same chip
Peter Lemenkov7e128572019-11-27 22:39:52 +0100103 device i2c 54 on end
104 device i2c 55 on end
105 device i2c 56 on end
106 device i2c 57 on end
107 device i2c 5c on end
108 device i2c 5d on end
109 device i2c 5e on end
110 device i2c 5f on end
Patrick Rudolphaae6e9c2016-12-30 17:02:04 +0100111 end
Peter Lemenkov7e128572019-11-27 22:39:52 +0100112 end # SMBus
Arthur Heymansb5df65a2022-11-12 14:51:49 +0100113 device ref sata2 off end # SATA Controller 2
114 device ref thermal off end # Thermal
Patrick Rudolphaae6e9c2016-12-30 17:02:04 +0100115 end
116 end
117end