blob: d493b790a7f421b9c39faa006f029460a09c04cf [file] [log] [blame]
Stefan Reinauerdebb11f2008-10-29 04:46:52 +00001/*
2 * This file is part of the coreboot project.
3 *
Stefan Reinauer54309d62009-01-20 22:53:10 +00004 * Copyright (C) 2008-2009 coresystems GmbH
Stefan Reinauerdebb11f2008-10-29 04:46:52 +00005 *
Stefan Reinauera8e11682009-03-11 14:54:18 +00006 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License as
8 * published by the Free Software Foundation; version 2 of
9 * the License.
Stefan Reinauerdebb11f2008-10-29 04:46:52 +000010 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
Stefan Reinauerdebb11f2008-10-29 04:46:52 +000015 */
16
17#include <console/console.h>
18#include <device/device.h>
19#include <device/pci.h>
Kyösti Mälkkidf128a52019-09-21 18:35:37 +030020#include <device/pci_def.h>
Kyösti Mälkkif1b58b72019-03-01 13:43:02 +020021#include <device/pci_ops.h>
Stefan Reinauerdebb11f2008-10-29 04:46:52 +000022#include <device/pci_ids.h>
Stefan Reinauerde3206a2010-02-22 06:09:43 +000023#include "i82801gx.h"
Stefan Reinauerdebb11f2008-10-29 04:46:52 +000024
25static void pci_init(struct device *dev)
26{
27 u16 reg16;
Stefan Reinauera8e11682009-03-11 14:54:18 +000028 u8 reg8;
Stefan Reinauerdebb11f2008-10-29 04:46:52 +000029
Stefan Reinauera8e11682009-03-11 14:54:18 +000030 /* Enable Bus Master */
31 reg16 = pci_read_config16(dev, PCI_COMMAND);
32 reg16 |= PCI_COMMAND_MASTER;
33 pci_write_config16(dev, PCI_COMMAND, reg16);
Stefan Reinauerdebb11f2008-10-29 04:46:52 +000034
Stefan Reinauera8e11682009-03-11 14:54:18 +000035 /* This device has no interrupt */
Stefan Reinauerde3206a2010-02-22 06:09:43 +000036 pci_write_config8(dev, INTR, 0xff);
Stefan Reinauera8e11682009-03-11 14:54:18 +000037
38 /* disable parity error response and SERR */
Kyösti Mälkkidf128a52019-09-21 18:35:37 +030039 reg16 = pci_read_config16(dev, PCI_BRIDGE_CONTROL);
40 reg16 &= ~PCI_BRIDGE_CTL_PARITY;
41 reg16 &= ~PCI_BRIDGE_CTL_SERR;
42 pci_write_config16(dev, PCI_BRIDGE_CONTROL, reg16);
Stefan Reinauerdebb11f2008-10-29 04:46:52 +000043
Stefan Reinauera8e11682009-03-11 14:54:18 +000044 /* Master Latency Count must be set to 0x04! */
Stefan Reinauerde3206a2010-02-22 06:09:43 +000045 reg8 = pci_read_config8(dev, SMLT);
Stefan Reinauera8e11682009-03-11 14:54:18 +000046 reg8 &= 0x07;
47 reg8 |= (0x04 << 3);
Stefan Reinauerde3206a2010-02-22 06:09:43 +000048 pci_write_config8(dev, SMLT, reg8);
Stefan Reinauer54309d62009-01-20 22:53:10 +000049
Stefan Reinauera8e11682009-03-11 14:54:18 +000050 /* Clear errors in status registers */
Stefan Reinauerde3206a2010-02-22 06:09:43 +000051 reg16 = pci_read_config16(dev, PSTS);
Stefan Reinauera8e11682009-03-11 14:54:18 +000052 //reg16 |= 0xf900;
Stefan Reinauerde3206a2010-02-22 06:09:43 +000053 pci_write_config16(dev, PSTS, reg16);
Stefan Reinauera8e11682009-03-11 14:54:18 +000054
Stefan Reinauerde3206a2010-02-22 06:09:43 +000055 reg16 = pci_read_config16(dev, SECSTS);
Stefan Reinauera8e11682009-03-11 14:54:18 +000056 // reg16 |= 0xf900;
Stefan Reinauerde3206a2010-02-22 06:09:43 +000057 pci_write_config16(dev, SECSTS, reg16);
Stefan Reinauerdebb11f2008-10-29 04:46:52 +000058}
59
Stefan Reinauerdebb11f2008-10-29 04:46:52 +000060static struct pci_operations pci_ops = {
Kyösti Mälkkidbd31322019-03-20 17:55:27 +020061 .set_subsystem = pci_dev_set_subsystem,
Stefan Reinauerdebb11f2008-10-29 04:46:52 +000062};
63
64static struct device_operations device_ops = {
65 .read_resources = pci_bus_read_resources,
66 .set_resources = pci_dev_set_resources,
Kyösti Mälkkia84a7342019-09-23 10:01:16 +030067 .enable_resources = pci_bus_enable_resources,
Stefan Reinauerdebb11f2008-10-29 04:46:52 +000068 .init = pci_init,
69 .scan_bus = pci_scan_bridge,
70 .ops_pci = &pci_ops,
71};
72
Stefan Reinauerdebb11f2008-10-29 04:46:52 +000073/* Desktop */
Uwe Hermannbddc6932008-10-29 13:51:31 +000074/* 82801BA/CA/DB/EB/ER/FB/FR/FW/FRW/GB/GR/GDH/HB/IB/6300ESB/i3100 */
Stefan Reinauerdebb11f2008-10-29 04:46:52 +000075static const struct pci_driver i82801g_pci __pci_driver = {
76 .ops = &device_ops,
Uwe Hermannbddc6932008-10-29 13:51:31 +000077 .vendor = PCI_VENDOR_ID_INTEL,
Uwe Hermann5d7a1c82008-10-31 18:41:09 +000078 .device = 0x244e,
Stefan Reinauerdebb11f2008-10-29 04:46:52 +000079};
80
81/* Mobile / Ultra Mobile */
Uwe Hermannbddc6932008-10-29 13:51:31 +000082/* 82801BAM/CAM/DBL/DBM/FBM/GBM/GHM/GU/HBM/HEM */
Stefan Reinauerdebb11f2008-10-29 04:46:52 +000083static const struct pci_driver i82801gmu_pci __pci_driver = {
84 .ops = &device_ops,
Uwe Hermannbddc6932008-10-29 13:51:31 +000085 .vendor = PCI_VENDOR_ID_INTEL,
Uwe Hermann5d7a1c82008-10-31 18:41:09 +000086 .device = 0x2448,
Stefan Reinauerdebb11f2008-10-29 04:46:52 +000087};