Angel Pons | 8a3453f | 2020-04-02 23:48:19 +0200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
Mario Scheithauer | 7fd20be | 2017-05-08 16:09:26 +0200 | [diff] [blame] | 2 | |
Werner Zeh | b64db83 | 2020-11-05 10:41:26 +0100 | [diff] [blame] | 3 | #include <acpi/acpi_device.h> |
| 4 | #include <acpi/acpigen.h> |
Mario Scheithauer | 7fd20be | 2017-05-08 16:09:26 +0200 | [diff] [blame] | 5 | #include <device/device.h> |
Werner Zeh | b64db83 | 2020-11-05 10:41:26 +0100 | [diff] [blame] | 6 | #include <device/i2c.h> |
| 7 | #include <device/i2c_bus.h> |
Mario Scheithauer | 7fd20be | 2017-05-08 16:09:26 +0200 | [diff] [blame] | 8 | #include <version.h> |
| 9 | #include <console/console.h> |
| 10 | #include <bcd.h> |
Werner Zeh | 6e6261e | 2017-06-29 08:37:14 +0200 | [diff] [blame] | 11 | #include <timer.h> |
Mario Scheithauer | 7fd20be | 2017-05-08 16:09:26 +0200 | [diff] [blame] | 12 | #include "chip.h" |
| 13 | #include "rx6110sa.h" |
| 14 | |
Werner Zeh | 57cbd21 | 2017-05-29 14:28:15 +0200 | [diff] [blame] | 15 | /* Function to write a register in the RTC with the given value. */ |
| 16 | static void rx6110sa_write(struct device *dev, uint8_t reg, uint8_t val) |
| 17 | { |
Aaron Durbin | 439cee9 | 2018-01-22 21:24:35 -0700 | [diff] [blame] | 18 | i2c_dev_writeb_at(dev, reg, val); |
Werner Zeh | 57cbd21 | 2017-05-29 14:28:15 +0200 | [diff] [blame] | 19 | } |
| 20 | |
| 21 | /* Function to read a register in the RTC. */ |
| 22 | static uint8_t rx6110sa_read(struct device *dev, uint8_t reg) |
| 23 | { |
Aaron Durbin | 439cee9 | 2018-01-22 21:24:35 -0700 | [diff] [blame] | 24 | return (uint8_t)i2c_dev_readb_at(dev, reg); |
Werner Zeh | 57cbd21 | 2017-05-29 14:28:15 +0200 | [diff] [blame] | 25 | } |
| 26 | |
Mario Scheithauer | 7fd20be | 2017-05-08 16:09:26 +0200 | [diff] [blame] | 27 | /* Set RTC date from coreboot build date. */ |
| 28 | static void rx6110sa_set_build_date(struct device *dev) |
| 29 | { |
Werner Zeh | 57cbd21 | 2017-05-29 14:28:15 +0200 | [diff] [blame] | 30 | rx6110sa_write(dev, YEAR_REG, coreboot_build_date.year); |
| 31 | rx6110sa_write(dev, MONTH_REG, coreboot_build_date.month); |
| 32 | rx6110sa_write(dev, DAY_REG, coreboot_build_date.day); |
| 33 | rx6110sa_write(dev, WEEK_REG, (1 << coreboot_build_date.weekday)); |
Mario Scheithauer | 7fd20be | 2017-05-08 16:09:26 +0200 | [diff] [blame] | 34 | } |
| 35 | |
| 36 | /* Set RTC date from user defined date (available in e.g. device tree). */ |
| 37 | static void rx6110sa_set_user_date(struct device *dev) |
| 38 | { |
| 39 | struct drivers_i2c_rx6110sa_config *config = dev->chip_info; |
| 40 | |
Werner Zeh | 57cbd21 | 2017-05-29 14:28:15 +0200 | [diff] [blame] | 41 | rx6110sa_write(dev, YEAR_REG, bin2bcd(config->user_year)); |
| 42 | rx6110sa_write(dev, MONTH_REG, bin2bcd(config->user_month)); |
| 43 | rx6110sa_write(dev, DAY_REG, bin2bcd(config->user_day)); |
| 44 | rx6110sa_write(dev, WEEK_REG, (1 << config->user_weekday)); |
Mario Scheithauer | 7fd20be | 2017-05-08 16:09:26 +0200 | [diff] [blame] | 45 | } |
| 46 | |
| 47 | static void rx6110sa_final(struct device *dev) |
| 48 | { |
| 49 | uint8_t hour, minute, second, year, month, day; |
| 50 | |
| 51 | /* Read back current RTC date and time and print it to the console. */ |
Werner Zeh | 57cbd21 | 2017-05-29 14:28:15 +0200 | [diff] [blame] | 52 | hour = rx6110sa_read(dev, HOUR_REG); |
| 53 | minute = rx6110sa_read(dev, MINUTE_REG); |
| 54 | second = rx6110sa_read(dev, SECOND_REG); |
| 55 | year = rx6110sa_read(dev, YEAR_REG); |
| 56 | month = rx6110sa_read(dev, MONTH_REG); |
| 57 | day = rx6110sa_read(dev, DAY_REG); |
Mario Scheithauer | 7fd20be | 2017-05-08 16:09:26 +0200 | [diff] [blame] | 58 | |
| 59 | printk(BIOS_INFO, "%s: Current date %02d.%02d.%02d %02d:%02d:%02d\n", |
| 60 | dev->chip_ops->name, bcd2bin(month), bcd2bin(day), |
| 61 | bcd2bin(year), bcd2bin(hour), bcd2bin(minute), bcd2bin(second)); |
| 62 | } |
| 63 | |
| 64 | static void rx6110sa_init(struct device *dev) |
| 65 | { |
| 66 | struct drivers_i2c_rx6110sa_config *config = dev->chip_info; |
Werner Zeh | 6e6261e | 2017-06-29 08:37:14 +0200 | [diff] [blame] | 67 | uint8_t reg, flags; |
| 68 | struct stopwatch sw; |
Mario Scheithauer | 7fd20be | 2017-05-08 16:09:26 +0200 | [diff] [blame] | 69 | |
Werner Zeh | 0dc405d | 2017-06-07 09:51:06 +0200 | [diff] [blame] | 70 | /* Do a dummy read first as requested in the datasheet. */ |
| 71 | rx6110sa_read(dev, SECOND_REG); |
Werner Zeh | 6e6261e | 2017-06-29 08:37:14 +0200 | [diff] [blame] | 72 | /* Check power loss status by reading the VLF-bit. */ |
| 73 | flags = rx6110sa_read(dev, FLAG_REGISTER); |
| 74 | if (flags & VLF_BIT) { |
| 75 | /* |
| 76 | * Voltage low detected, perform RX6110 SA reset sequence as |
| 77 | * requested in the datasheet. The meaning of the registers 0x60 |
| 78 | * and above is not documented in the datasheet, they have to be |
| 79 | * used as requested according to Epson. |
| 80 | */ |
| 81 | rx6110sa_write(dev, BATTERY_BACKUP_REG, 0x00); |
| 82 | rx6110sa_write(dev, CTRL_REG, 0x00); |
| 83 | rx6110sa_write(dev, CTRL_REG, TEST_BIT); |
| 84 | rx6110sa_write(dev, 0x60, 0xd3); |
| 85 | rx6110sa_write(dev, 0x66, 0x03); |
| 86 | rx6110sa_write(dev, 0x6b, 0x02); |
| 87 | rx6110sa_write(dev, 0x6b, 0x01); |
| 88 | /* According to the datasheet one have to wait for at least 2 ms |
| 89 | * before the VLF bit can be cleared in the flag register after |
| 90 | * this reset sequence. As the other registers are still |
| 91 | * accessible use the stopwatch to parallel the flow. |
| 92 | */ |
| 93 | stopwatch_init_msecs_expire(&sw, AFTER_RESET_DELAY_MS); |
| 94 | } |
Werner Zeh | 0dc405d | 2017-06-07 09:51:06 +0200 | [diff] [blame] | 95 | /* |
Werner Zeh | 6e6261e | 2017-06-29 08:37:14 +0200 | [diff] [blame] | 96 | * Set up important registers even if there was no power loss to make |
| 97 | * sure that the right mode is used as it directly influences the |
| 98 | * backup current consumption and therefore the backup time. These |
| 99 | * settings do not change current date and time and the RTC will not |
| 100 | * be stopped while the registers are set up. |
Werner Zeh | 0dc405d | 2017-06-07 09:51:06 +0200 | [diff] [blame] | 101 | */ |
| 102 | reg = (config->pmon_sampling & PMON_SAMPL_MASK) | |
| 103 | (!!config->bks_off << 2) | (!!config->bks_on << 3) | |
| 104 | (!!config->iocut_en << 4); |
| 105 | rx6110sa_write(dev, BATTERY_BACKUP_REG, reg); |
Mario Scheithauer | 7fd20be | 2017-05-08 16:09:26 +0200 | [diff] [blame] | 106 | |
| 107 | /* Clear timer enable bit and set frequency of clock output. */ |
Werner Zeh | 57cbd21 | 2017-05-29 14:28:15 +0200 | [diff] [blame] | 108 | reg = rx6110sa_read(dev, EXTENSION_REG); |
Werner Zeh | 6e6261e | 2017-06-29 08:37:14 +0200 | [diff] [blame] | 109 | reg &= ~(FSEL_MASK); |
| 110 | reg |= ((config->cof_selection << 6) & FSEL_MASK); |
Werner Zeh | 0dc405d | 2017-06-07 09:51:06 +0200 | [diff] [blame] | 111 | if (config->timer_preset) { |
| 112 | /* Timer needs to be in stop mode prior to programming it. */ |
Werner Zeh | 6e6261e | 2017-06-29 08:37:14 +0200 | [diff] [blame] | 113 | if (reg & TE_BIT) { |
| 114 | reg &= ~TE_BIT; |
| 115 | rx6110sa_write(dev, EXTENSION_REG, reg); |
| 116 | } |
Werner Zeh | 0dc405d | 2017-06-07 09:51:06 +0200 | [diff] [blame] | 117 | /* Program the timer preset value. */ |
| 118 | rx6110sa_write(dev, TMR_COUNTER_0_REG, |
| 119 | config->timer_preset & 0xff); |
| 120 | rx6110sa_write(dev, TMR_COUNTER_1_REG, |
| 121 | (config->timer_preset >> 8) & 0xff); |
| 122 | /* Set Timer Enable bit and the timer clock value. */ |
Werner Zeh | 6e6261e | 2017-06-29 08:37:14 +0200 | [diff] [blame] | 123 | reg &= ~TSEL_MASK; |
Werner Zeh | 0dc405d | 2017-06-07 09:51:06 +0200 | [diff] [blame] | 124 | reg |= ((!!config->timer_en << 4) | |
| 125 | (config->timer_clk & TSEL_MASK)); |
| 126 | } |
Werner Zeh | 57cbd21 | 2017-05-29 14:28:15 +0200 | [diff] [blame] | 127 | rx6110sa_write(dev, EXTENSION_REG, reg); |
Werner Zeh | 6e6261e | 2017-06-29 08:37:14 +0200 | [diff] [blame] | 128 | rx6110sa_write(dev, CTRL_REG, 0x00); |
| 129 | rx6110sa_write(dev, DIGITAL_REG, 0x00); |
| 130 | rx6110sa_write(dev, RESERVED_BIT_REG, RTC_INIT_VALUE); |
| 131 | reg = (!!config->enable_1hz_out << 4) | |
| 132 | (!!config->irq_output_pin << 2) | |
| 133 | (config->fout_output_pin & FOUT_OUTPUT_PIN_MASK); |
| 134 | rx6110sa_write(dev, IRQ_CONTROL_REG, reg); |
| 135 | /* If there was no power loss event no further steps are needed. */ |
| 136 | if (!(flags & VLF_BIT)) |
| 137 | return; |
| 138 | /* There was a power loss event, clear voltage low detect bit. |
| 139 | * Take the needed delay after a reset sequence into account before the |
| 140 | * VLF-bit can be cleared. |
| 141 | */ |
Jonathan Neuschäfer | c966075 | 2017-09-19 15:19:54 +0200 | [diff] [blame] | 142 | stopwatch_wait_until_expired(&sw); |
Werner Zeh | 85227a2 | 2017-08-07 08:59:13 +0200 | [diff] [blame] | 143 | flags &= ~VLF_BIT; |
Werner Zeh | 6e6261e | 2017-06-29 08:37:14 +0200 | [diff] [blame] | 144 | rx6110sa_write(dev, FLAG_REGISTER, flags); |
Mario Scheithauer | 7fd20be | 2017-05-08 16:09:26 +0200 | [diff] [blame] | 145 | |
| 146 | /* Before setting the clock stop oscillator. */ |
Werner Zeh | 57cbd21 | 2017-05-29 14:28:15 +0200 | [diff] [blame] | 147 | rx6110sa_write(dev, CTRL_REG, STOP_BIT); |
| 148 | |
Mario Scheithauer | 7fd20be | 2017-05-08 16:09:26 +0200 | [diff] [blame] | 149 | if (config->set_user_date) { |
| 150 | /* Set user date defined in device tree. */ |
| 151 | printk(BIOS_DEBUG, "%s: Set to user date\n", |
| 152 | dev->chip_ops->name); |
| 153 | rx6110sa_set_user_date(dev); |
| 154 | } else { |
| 155 | /* Set date from coreboot build. */ |
| 156 | printk(BIOS_DEBUG, "%s: Set to coreboot build date\n", |
| 157 | dev->chip_ops->name); |
| 158 | rx6110sa_set_build_date(dev); |
| 159 | } |
Werner Zeh | 57cbd21 | 2017-05-29 14:28:15 +0200 | [diff] [blame] | 160 | rx6110sa_write(dev, HOUR_REG, 1); |
| 161 | rx6110sa_write(dev, MINUTE_REG, 0); |
| 162 | rx6110sa_write(dev, SECOND_REG, 0); |
Mario Scheithauer | 7fd20be | 2017-05-08 16:09:26 +0200 | [diff] [blame] | 163 | /* Start oscillator again as the RTC is set up now. */ |
Werner Zeh | 0dc405d | 2017-06-07 09:51:06 +0200 | [diff] [blame] | 164 | reg = (!!config->timer_irq_en << 4) | |
| 165 | (config->timer_mode & TMR_MODE_MASK); |
| 166 | rx6110sa_write(dev, CTRL_REG, reg); |
Mario Scheithauer | 7fd20be | 2017-05-08 16:09:26 +0200 | [diff] [blame] | 167 | } |
| 168 | |
Werner Zeh | b64db83 | 2020-11-05 10:41:26 +0100 | [diff] [blame] | 169 | #if CONFIG(HAVE_ACPI_TABLES) |
| 170 | static void rx6110sa_fill_ssdt(const struct device *dev) |
| 171 | { |
| 172 | struct drivers_i2c_rx6110sa_config *config = dev->chip_info; |
| 173 | const char *scope = acpi_device_scope(dev); |
| 174 | enum i2c_speed bus_speed; |
| 175 | |
| 176 | if (!scope) |
| 177 | return; |
| 178 | |
| 179 | switch (config->bus_speed) { |
| 180 | case I2C_SPEED_STANDARD: |
| 181 | case I2C_SPEED_FAST: |
| 182 | bus_speed = config->bus_speed; |
| 183 | break; |
| 184 | default: |
| 185 | printk(BIOS_INFO, "%s: Bus speed unsupported, fall back to %d kHz!\n", |
| 186 | dev_path(dev), I2C_SPEED_STANDARD / 1000); |
| 187 | bus_speed = I2C_SPEED_STANDARD; |
| 188 | break; |
| 189 | } |
| 190 | |
| 191 | struct acpi_i2c i2c = { |
| 192 | .address = dev->path.i2c.device, |
| 193 | .mode_10bit = dev->path.i2c.mode_10bit, |
| 194 | .speed = bus_speed, |
| 195 | .resource = scope, |
| 196 | }; |
| 197 | |
| 198 | /* Device */ |
| 199 | acpigen_write_scope(scope); |
| 200 | acpigen_write_device(acpi_device_name(dev)); |
Werner Zeh | dac1a45 | 2021-03-02 10:54:52 +0100 | [diff] [blame^] | 201 | acpigen_write_name_string("_HID", RX6110SA_HID_NAME); |
Werner Zeh | b64db83 | 2020-11-05 10:41:26 +0100 | [diff] [blame] | 202 | acpigen_write_name_string("_DDN", RX6110SA_HID_DESC); |
| 203 | acpigen_write_STA(acpi_device_status(dev)); |
| 204 | |
| 205 | /* Resources */ |
| 206 | acpigen_write_name("_CRS"); |
| 207 | acpigen_write_resourcetemplate_header(); |
| 208 | acpi_device_write_i2c(&i2c); |
| 209 | |
| 210 | acpigen_write_resourcetemplate_footer(); |
| 211 | |
| 212 | acpigen_pop_len(); /* Device */ |
| 213 | acpigen_pop_len(); /* Scope */ |
| 214 | |
| 215 | printk(BIOS_INFO, "%s: %s at %s\n", acpi_device_path(dev), |
| 216 | dev->chip_ops->name, dev_path(dev)); |
| 217 | } |
| 218 | |
| 219 | static const char *rx6110sa_acpi_name(const struct device *dev) |
| 220 | { |
| 221 | return RX6110SA_ACPI_NAME; |
| 222 | } |
| 223 | #endif |
| 224 | |
Mario Scheithauer | 7fd20be | 2017-05-08 16:09:26 +0200 | [diff] [blame] | 225 | static struct device_operations rx6110sa_ops = { |
Nico Huber | 2f8ba69 | 2020-04-05 14:05:24 +0200 | [diff] [blame] | 226 | .read_resources = noop_read_resources, |
| 227 | .set_resources = noop_set_resources, |
Mario Scheithauer | 7fd20be | 2017-05-08 16:09:26 +0200 | [diff] [blame] | 228 | .init = rx6110sa_init, |
Werner Zeh | b64db83 | 2020-11-05 10:41:26 +0100 | [diff] [blame] | 229 | .final = rx6110sa_final, |
| 230 | #if CONFIG(HAVE_ACPI_TABLES) |
| 231 | .acpi_name = rx6110sa_acpi_name, |
| 232 | .acpi_fill_ssdt = rx6110sa_fill_ssdt, |
| 233 | #endif |
Mario Scheithauer | 7fd20be | 2017-05-08 16:09:26 +0200 | [diff] [blame] | 234 | }; |
| 235 | |
| 236 | static void rx6110sa_enable(struct device *dev) |
| 237 | { |
| 238 | dev->ops = &rx6110sa_ops; |
| 239 | } |
| 240 | |
| 241 | struct chip_operations drivers_i2c_rx6110sa_ops = { |
| 242 | CHIP_NAME("RX6110 SA") |
| 243 | .enable_dev = rx6110sa_enable |
| 244 | }; |