Angel Pons | ae59387 | 2020-04-04 18:50:57 +0200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
Martin Roth | 5c354b9 | 2019-04-22 14:55:16 -0600 | [diff] [blame] | 2 | |
| 3 | External(\_SB.ALIB, MethodObj) |
| 4 | |
| 5 | /* System Bus */ |
| 6 | /* _SB.PCI0 */ |
| 7 | |
| 8 | /* Operating System Capabilities Method */ |
| 9 | Method(_OSC,4) |
| 10 | { |
| 11 | /* Check for proper PCI/PCIe UUID */ |
Elyes HAOUAS | 28b68ae | 2020-09-24 20:18:26 +0200 | [diff] [blame] | 12 | If (Arg0 == ToUUID("33DB4D5B-1FF7-401C-9657-7441C03DD766")) |
Martin Roth | 5c354b9 | 2019-04-22 14:55:16 -0600 | [diff] [blame] | 13 | { |
| 14 | /* Let OS control everything */ |
| 15 | Return (Arg3) |
| 16 | } Else { |
| 17 | CreateDWordField(Arg3,0,CDW1) |
Elyes HAOUAS | 28b68ae | 2020-09-24 20:18:26 +0200 | [diff] [blame] | 18 | CDW1 |= 4 // Unrecognized UUID |
| 19 | Return (Arg3) |
Martin Roth | 5c354b9 | 2019-04-22 14:55:16 -0600 | [diff] [blame] | 20 | } |
| 21 | } |
| 22 | |
Martin Roth | 5c354b9 | 2019-04-22 14:55:16 -0600 | [diff] [blame] | 23 | /* 0:14.3 - LPC */ |
| 24 | #include <soc/amd/common/acpi/lpc.asl> |
Josie Nordrum | da4d9da | 2020-10-22 17:50:20 -0600 | [diff] [blame^] | 25 | #include <soc/amd/common/acpi/platform.asl> |
Martin Roth | 5c354b9 | 2019-04-22 14:55:16 -0600 | [diff] [blame] | 26 | |
Martin Roth | 5c354b9 | 2019-04-22 14:55:16 -0600 | [diff] [blame] | 27 | Name(CRES, ResourceTemplate() { |
| 28 | /* Set the Bus number and Secondary Bus number for the PCI0 device |
| 29 | * The Secondary bus range for PCI0 lets the system |
| 30 | * know what bus values are allowed on the downstream |
| 31 | * side of this PCI bus if there is a PCI-PCI bridge. |
| 32 | * PCI busses can have 256 secondary busses which |
| 33 | * range from [0-0xFF] but they do not need to be |
| 34 | * sequential. |
| 35 | */ |
| 36 | WordBusNumber (ResourceProducer, MinFixed, MaxFixed, PosDecode, |
| 37 | 0x0000, /* address granularity */ |
| 38 | 0x0000, /* range minimum */ |
| 39 | 0x00ff, /* range maximum */ |
| 40 | 0x0000, /* translation */ |
| 41 | 0x0100, /* length */ |
| 42 | ,, PSB0) /* ResourceSourceIndex, ResourceSource, DescriptorName */ |
| 43 | |
| 44 | IO(Decode16, 0x0cf8, 0x0cf8, 1, 8) |
| 45 | |
| 46 | WORDIO(ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, |
| 47 | 0x0000, /* address granularity */ |
| 48 | 0x0000, /* range minimum */ |
| 49 | 0x0cf7, /* range maximum */ |
| 50 | 0x0000, /* translation */ |
| 51 | 0x0cf8 /* length */ |
| 52 | ) |
Martin Roth | 5c354b9 | 2019-04-22 14:55:16 -0600 | [diff] [blame] | 53 | |
| 54 | WORDIO(ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, |
| 55 | 0x0000, /* address granularity */ |
| 56 | 0x0d00, /* range minimum */ |
| 57 | 0xffff, /* range maximum */ |
| 58 | 0x0000, /* translation */ |
| 59 | 0xf300 /* length */ |
| 60 | ) |
| 61 | |
| 62 | Memory32Fixed(READONLY, 0x000a0000, 0x00020000, VGAM) /* VGA memory space */ |
| 63 | Memory32Fixed(READONLY, 0x000c0000, 0x00020000, EMM1) /* Assume C0000-E0000 empty */ |
| 64 | |
| 65 | /* memory space for PCI BARs below 4GB */ |
| 66 | Memory32Fixed(ReadOnly, 0x00000000, 0x00000000, MMIO) |
| 67 | }) /* End Name(_SB.PCI0.CRES) */ |
| 68 | |
| 69 | Method(_CRS, 0) { |
| 70 | /* DBGO("\\_SB\\PCI0\\_CRS\n") */ |
| 71 | CreateDWordField(CRES, ^MMIO._BAS, MM1B) |
| 72 | CreateDWordField(CRES, ^MMIO._LEN, MM1L) |
| 73 | |
| 74 | /* |
| 75 | * Declare memory between TOM1 and 4GB as available |
| 76 | * for PCI MMIO. |
| 77 | * Use ShiftLeft to avoid 64bit constant (for XP). |
| 78 | * This will work even if the OS does 32bit arithmetic, as |
| 79 | * 32bit (0x00000000 - TOM1) will wrap and give the same |
| 80 | * result as 64bit (0x100000000 - TOM1). |
| 81 | */ |
Elyes HAOUAS | 28b68ae | 2020-09-24 20:18:26 +0200 | [diff] [blame] | 82 | MM1B = TOM1 |
| 83 | Local0 = 0x10000000 << 4 |
| 84 | Local0 -= TOM1 |
| 85 | MM1L = Local0 |
Martin Roth | 5c354b9 | 2019-04-22 14:55:16 -0600 | [diff] [blame] | 86 | |
Aaron Durbin | 8c28e51 | 2020-06-23 13:49:21 -0600 | [diff] [blame] | 87 | CreateWordField(CRES, ^PSB0._MAX, BMAX) |
| 88 | CreateWordField(CRES, ^PSB0._LEN, BLEN) |
Elyes HAOUAS | 28b68ae | 2020-09-24 20:18:26 +0200 | [diff] [blame] | 89 | BMAX = CONFIG_MMCONF_BUS_NUMBER - 1 |
| 90 | BLEN = CONFIG_MMCONF_BUS_NUMBER |
Aaron Durbin | 8c28e51 | 2020-06-23 13:49:21 -0600 | [diff] [blame] | 91 | |
Martin Roth | 5c354b9 | 2019-04-22 14:55:16 -0600 | [diff] [blame] | 92 | Return(CRES) /* note to change the Name buffer */ |
| 93 | } /* end of Method(_SB.PCI0._CRS) */ |