blob: b110e98249cfa6a791c75eaae6e06816c19e134f [file] [log] [blame]
Sergej Ivanovd777c782015-04-03 18:10:27 +03001/*
2 * This file is part of the coreboot project.
3 *
4 * Copyright (C) 2012 Advanced Micro Devices, Inc.
5 * Copyright (C) 2015 Sergej Ivanov <getinaks@gmail.com>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; version 2 of the License.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
19 */
20
21#include <device/azalia.h>
22#include "AGESA.h"
23#include "amdlib.h"
24#include <northbridge/amd/agesa/BiosCallOuts.h>
25#include "Ids.h"
26#include "OptionsIds.h"
27#include "heapManager.h"
28#include "FchPlatform.h"
29#include "cbfs.h"
30#include <stdlib.h>
31
32static AGESA_STATUS Fch_Oem_config(UINT32 Func, UINT32 FchData, VOID *ConfigPtr);
33
34const BIOS_CALLOUT_STRUCT BiosCallouts[] =
35{
36 {AGESA_DO_RESET, agesa_Reset },
37 {AGESA_READ_SPD, agesa_ReadSpd },
38 {AGESA_READ_SPD_RECOVERY, agesa_NoopUnsupported },
39 {AGESA_RUNFUNC_ONAP, agesa_RunFuncOnAp },
40 {AGESA_GET_IDS_INIT_DATA, agesa_EmptyIdsInitData },
41 {AGESA_HOOKBEFORE_DQS_TRAINING, agesa_NoopSuccess },
42 {AGESA_HOOKBEFORE_EXIT_SELF_REF, agesa_NoopSuccess },
43 {AGESA_FCH_OEM_CALLOUT, Fch_Oem_config },
44 {AGESA_GNB_GFX_GET_VBIOS_IMAGE, agesa_GfxGetVbiosImage }
45};
46const int BiosCalloutsLen = ARRAY_SIZE(BiosCallouts);
47
48/**
49 * CODEC Initialization Table for Azalia HD Audio using Realtek ALC662 chip (from linux, running under vendor bios)
50 */
51const CODEC_ENTRY Alc662_VerbTbl[] =
52{
53 { 0x14, 0x01014410 },
54 { 0x15, 0x411111f0 },
55 { 0x16, 0x411111f0 },
56 { 0x18, 0x01a19c30 },
57 { 0x19, 0x02a19c40 },
58 { 0x1a, 0x0181343f },
59 { 0x1b, 0x02214c20 },
60 { 0x1c, 0x411111f0 },
61 { 0x1d, 0x4004c601 },
62 { 0x1e, 0x411111f0 },
63 { 0xff, 0xffffffff }
64};
65
66
67static const CODEC_TBL_LIST CodecTableList[] =
68{
69 {0x10ec0662, (CODEC_ENTRY*)&Alc662_VerbTbl[0]},
70 {(UINT32)0x0FFFFFFFF, (CODEC_ENTRY*)0x0FFFFFFFFUL}
71};
72
73#define FAN_INPUT_INTERNAL_DIODE 0
74#define FAN_INPUT_TEMP0 1
75#define FAN_INPUT_TEMP1 2
76#define FAN_INPUT_TEMP2 3
77#define FAN_INPUT_TEMP3 4
78#define FAN_INPUT_TEMP0_FILTER 5
79#define FAN_INPUT_ZERO 6
80#define FAN_INPUT_DISABLED 7
81
82#define FAN_AUTOMODE (1 << 0)
83#define FAN_LINEARMODE (1 << 1)
84#define FAN_STEPMODE ~(1 << 1)
85#define FAN_POLARITY_HIGH (1 << 2)
86#define FAN_POLARITY_LOW ~(1 << 2)
87
88/* Normally, 4-wire fan runs at 25KHz and 3-wire fan runs at 100Hz */
89#define FREQ_28KHZ 0x0
90#define FREQ_25KHZ 0x1
91#define FREQ_23KHZ 0x2
92#define FREQ_21KHZ 0x3
93#define FREQ_29KHZ 0x4
94#define FREQ_18KHZ 0x5
95#define FREQ_100HZ 0xF7
96#define FREQ_87HZ 0xF8
97#define FREQ_58HZ 0xF9
98#define FREQ_44HZ 0xFA
99#define FREQ_35HZ 0xFB
100#define FREQ_29HZ 0xFC
101#define FREQ_22HZ 0xFD
102#define FREQ_14HZ 0xFE
103#define FREQ_11HZ 0xFF
104
105
106
107/**
108 * Fch Oem setting callback
109 *
110 * Configure platform specific Hudson device,
111 * such Azalia, SATA, IMC etc.
112 */
113static AGESA_STATUS Fch_Oem_config(UINT32 Func, UINT32 FchData, VOID *ConfigPtr)
114{
115 AMD_CONFIG_PARAMS *StdHeader = ConfigPtr;
116
117 if (StdHeader->Func == AMD_INIT_RESET) {
118 FCH_RESET_DATA_BLOCK *FchParams_reset = (FCH_RESET_DATA_BLOCK *)FchData;
119 printk(BIOS_DEBUG, "Fch OEM config in INIT RESET \n");
120 FchParams_reset->FchReset.Xhci0Enable = IS_ENABLED(CONFIG_HUDSON_XHCI_ENABLE);
121 FchParams_reset->FchReset.Xhci1Enable = FALSE;
122 FchParams_reset->LegacyFree = IS_ENABLED(CONFIG_HUDSON_LEGACY_FREE);
123 FchParams_reset->FchReset.SataEnable = 1;
124 FchParams_reset->FchReset.IdeEnable = 0;
125 } else if (StdHeader->Func == AMD_INIT_ENV) {
126 FCH_DATA_BLOCK *FchParams_env = (FCH_DATA_BLOCK *)FchData;
127 printk(BIOS_DEBUG, "Fch OEM config in INIT ENV\n");
128
129 /* Azalia Controller OEM Codec Table Pointer */
130 FchParams_env->Azalia.AzaliaOemCodecTablePtr = (CODEC_TBL_LIST*)(&CodecTableList[0]);
131 /* Azalia Controller Front Panel OEM Table Pointer */
132
133 FchParams_env->Imc.ImcEnable = FALSE;
134 FchParams_env->Hwm.HwMonitorEnable = FALSE;
135 FchParams_env->Hwm.HwmFchtsiAutoPoll = FALSE;/* 1 enable, 0 disable TSI Auto Polling */
136
137 /* sata configuration */
138 printk(BIOS_DEBUG, "Configuring SATA: selected mode = ");
139 FchParams_env->Sata.SataClass = CONFIG_HUDSON_SATA_MODE;
140 switch ((SATA_CLASS)CONFIG_HUDSON_SATA_MODE) { // code from olivehillplus (ft3b) - only one place where sata is configured
141 case SataLegacyIde:
142 case SataRaid:
143 case SataAhci:
144 case SataAhci7804:
145 FchParams_env->Sata.SataIdeMode = FALSE;
146 printk(BIOS_DEBUG, "AHCI or RAID or IDE = %x\n", CONFIG_HUDSON_SATA_MODE);
147 break;
148
149 case SataIde2Ahci:
150 case SataIde2Ahci7804:
151 default: /* SataNativeIde */
152 FchParams_env->Sata.SataIdeMode = TRUE;
153 printk(BIOS_DEBUG, "IDE2AHCI = %x\n", CONFIG_HUDSON_SATA_MODE);
154 break;
155 }
156 /* XHCI configuration */
157 FchParams_env->Usb.Xhci0Enable = IS_ENABLED(CONFIG_HUDSON_XHCI_ENABLE);
158 FchParams_env->Usb.Xhci1Enable = FALSE;
159 }
160 printk(BIOS_DEBUG, "Done\n");
161
162 return AGESA_SUCCESS;
163}