| Martin Roth | d75800c | 2014-05-12 21:56:27 -0600 | [diff] [blame^] | 1 | ## |
| 2 | ## This file is part of the coreboot project. |
| 3 | ## |
| 4 | ## Copyright (C) 2013-2014 Sage Electronic Engineering, LLC. |
| 5 | ## |
| 6 | ## This program is free software; you can redistribute it and/or modify |
| 7 | ## it under the terms of the GNU General Public License as published by |
| 8 | ## the Free Software Foundation; version 2 of the License. |
| 9 | ## |
| 10 | ## This program is distributed in the hope that it will be useful, |
| 11 | ## but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | ## GNU General Public License for more details. |
| 14 | ## |
| 15 | ## You should have received a copy of the GNU General Public License |
| 16 | ## along with this program; if not, write to the Free Software |
| 17 | ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA |
| 18 | ## |
| 19 | |
| 20 | if BOARD_INTEL_BAYLEYBAY_FSP |
| 21 | |
| 22 | config BOARD_SPECIFIC_OPTIONS # dummy |
| 23 | def_bool y |
| 24 | select SOC_INTEL_FSP_BAYTRAIL |
| 25 | select BOARD_ROMSIZE_KB_2048 |
| 26 | select HAVE_ACPI_TABLES |
| 27 | select HAVE_OPTION_TABLE |
| 28 | select EARLY_CBMEM_INIT |
| 29 | select OVERRIDE_MRC_CACHE_LOC |
| 30 | select POST_IO |
| 31 | select INCLUDE_MICROCODE_IN_BUILD if FSP_PACKAGE_DEFAULT |
| 32 | select ENABLE_BUILTIN_COM1 if FSP_PACKAGE_DEFAULT |
| 33 | select HAVE_FSP_BIN if FSP_PACKAGE_DEFAULT |
| 34 | select DEFAULT_CONSOLE_LOGLEVEL_7 if FSP_PACKAGE_DEFAULT |
| 35 | |
| 36 | config MAINBOARD_DIR |
| 37 | string |
| 38 | default "intel/bayleybay_fsp" |
| 39 | |
| 40 | config INCLUDE_ME |
| 41 | bool |
| 42 | default n |
| 43 | |
| 44 | config LOCK_MANAGEMENT_ENGINE |
| 45 | bool |
| 46 | default n |
| 47 | |
| 48 | config MAINBOARD_PART_NUMBER |
| 49 | string |
| 50 | default "Bayley Bay CRB" |
| 51 | |
| 52 | config MMCONF_BASE_ADDRESS |
| 53 | hex |
| 54 | default 0xe0000000 |
| 55 | |
| 56 | config IRQ_SLOT_COUNT |
| 57 | int |
| 58 | default 18 |
| 59 | |
| 60 | config MAX_CPUS |
| 61 | int |
| 62 | default 16 |
| 63 | |
| 64 | config CACHE_ROM_SIZE_OVERRIDE |
| 65 | hex |
| 66 | default 0x800000 |
| 67 | |
| 68 | config FSP_LOC |
| 69 | hex |
| 70 | default 0xfffc0000 |
| 71 | |
| 72 | config FSP_FILE |
| 73 | string |
| 74 | default "../intel/fsp/baytrail/BAYTRAIL_FSP.fd" |
| 75 | |
| 76 | config MRC_CACHE_LOC_OVERRIDE |
| 77 | hex |
| 78 | default 0xfff80000 |
| 79 | depends on ENABLE_FAST_BOOT |
| 80 | |
| 81 | config CBFS_SIZE |
| 82 | hex |
| 83 | default 0x00200000 |
| 84 | |
| 85 | config DRIVERS_PS2_KEYBOARD |
| 86 | bool |
| 87 | default n |
| 88 | |
| 89 | config CONSOLE_POST |
| 90 | bool |
| 91 | default y |
| 92 | |
| 93 | config ENABLE_FSP_FAST_BOOT |
| 94 | bool |
| 95 | depends on HAVE_FSP_BIN |
| 96 | default y |
| 97 | |
| 98 | config VIRTUAL_ROM_SIZE |
| 99 | hex |
| 100 | depends on ENABLE_FSP_FAST_BOOT |
| 101 | default 0x800000 |
| 102 | |
| 103 | config FSP_PACKAGE_DEFAULT |
| 104 | bool "Configure defaults for the Intel FSP package" |
| 105 | default n |
| 106 | |
| 107 | config VGA_BIOS |
| 108 | bool |
| 109 | default y if FSP_PACKAGE_DEFAULT |
| 110 | |
| 111 | endif # BOARD_INTEL_BAYLEYBAY_FSP |