Patrick Georgi | ac95903 | 2020-05-05 22:49:26 +0200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 2 | |
Martin Roth | cddd600 | 2019-09-23 17:38:27 -0600 | [diff] [blame] | 3 | /* Based on Linux Kernel TPM driver */ |
| 4 | |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 5 | /* |
Martin Roth | 0949e73 | 2021-10-01 14:28:22 -0600 | [diff] [blame] | 6 | * cr50 is a TPM 2.0 capable device that requires special |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 7 | * handling for the I2C interface. |
| 8 | * |
| 9 | * - Use an interrupt for transaction status instead of hardcoded delays |
| 10 | * - Must use write+wait+read read protocol |
| 11 | * - All 4 bytes of status register must be read/written at once |
| 12 | * - Burst count max is 63 bytes, and burst count behaves |
| 13 | * slightly differently than other I2C TPMs |
| 14 | * - When reading from FIFO the full burstcnt must be read |
| 15 | * instead of just reading header and determining the remainder |
| 16 | */ |
| 17 | |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 18 | #include <commonlib/endian.h> |
Elyes HAOUAS | 361a935 | 2019-12-18 21:26:33 +0100 | [diff] [blame] | 19 | #include <commonlib/helpers.h> |
Tim Wawrzynczak | 1e50dfb | 2022-02-16 13:48:07 -0700 | [diff] [blame] | 20 | #include <console/console.h> |
| 21 | #include <delay.h> |
| 22 | #include <device/i2c_simple.h> |
| 23 | #include <drivers/tpm/cr50.h> |
| 24 | #include <endian.h> |
| 25 | #include <security/tpm/tis.h> |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 26 | #include <string.h> |
| 27 | #include <types.h> |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 28 | #include <timer.h> |
Elyes HAOUAS | ede8dd0 | 2019-06-23 06:57:53 +0200 | [diff] [blame] | 29 | |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 30 | #include "tpm.h" |
| 31 | |
Duncan Laurie | 3727a8d | 2016-09-19 16:37:46 -0700 | [diff] [blame] | 32 | #define CR50_MAX_BUFSIZE 63 |
Duncan Laurie | 469af7b | 2017-11-07 09:13:19 -0800 | [diff] [blame] | 33 | #define CR50_TIMEOUT_INIT_MS 30000 /* Very long timeout for TPM init */ |
Duncan Laurie | 1dc036c | 2016-09-19 16:49:23 -0700 | [diff] [blame] | 34 | #define CR50_TIMEOUT_LONG_MS 2000 /* Long timeout while waiting for TPM */ |
| 35 | #define CR50_TIMEOUT_SHORT_MS 2 /* Short timeout during transactions */ |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 36 | #define CR50_DID_VID 0x00281ae0L |
Jett Rink | d41ad72 | 2024-06-10 09:31:14 -0600 | [diff] [blame^] | 37 | #define TI50_DT_DID_VID 0x504a6666L |
| 38 | #define TI50_OT_DID_VID 0x50666666L |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 39 | |
| 40 | struct tpm_inf_dev { |
| 41 | int bus; |
Sergii Dmytruk | 86f845a | 2022-10-29 18:55:24 +0300 | [diff] [blame] | 42 | int locality; |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 43 | unsigned int addr; |
Duncan Laurie | 3727a8d | 2016-09-19 16:37:46 -0700 | [diff] [blame] | 44 | uint8_t buf[CR50_MAX_BUFSIZE + sizeof(uint8_t)]; |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 45 | }; |
| 46 | |
Patrick Georgi | c9b1359 | 2019-11-29 11:47:47 +0100 | [diff] [blame] | 47 | static struct tpm_inf_dev tpm_dev; |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 48 | |
| 49 | /* |
Duncan Laurie | 510cb6a | 2016-09-19 17:05:45 -0700 | [diff] [blame] | 50 | * cr50_i2c_read() - read from TPM register |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 51 | * |
| 52 | * @addr: register address to read from |
| 53 | * @buffer: provided by caller |
| 54 | * @len: number of bytes to read |
| 55 | * |
| 56 | * 1) send register address byte 'addr' to the TPM |
| 57 | * 2) wait for TPM to indicate it is ready |
| 58 | * 3) read 'len' bytes of TPM response into the provided 'buffer' |
| 59 | * |
Jon Murphy | d7b8dc9 | 2023-09-05 11:36:43 -0600 | [diff] [blame] | 60 | * Returns TSS Return Code from TCG TPM Structures. See tss_errors.h |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 61 | */ |
Jon Murphy | d7b8dc9 | 2023-09-05 11:36:43 -0600 | [diff] [blame] | 62 | static tpm_result_t cr50_i2c_read(uint8_t addr, uint8_t *buffer, size_t len) |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 63 | { |
Patrick Georgi | c9b1359 | 2019-11-29 11:47:47 +0100 | [diff] [blame] | 64 | if (tpm_dev.addr == 0) |
Jon Murphy | db4e93b | 2023-09-05 11:38:59 -0600 | [diff] [blame] | 65 | return TPM_CB_INVALID_ARG; |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 66 | |
Duncan Laurie | 94cc485 | 2016-09-19 17:22:10 -0700 | [diff] [blame] | 67 | /* Clear interrupt before starting transaction */ |
Grzegorz Bernacki | 7758b47 | 2023-06-14 12:01:32 +0000 | [diff] [blame] | 68 | cr50_plat_irq_status(); |
Duncan Laurie | 94cc485 | 2016-09-19 17:22:10 -0700 | [diff] [blame] | 69 | |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 70 | /* Send the register address byte to the TPM */ |
Patrick Georgi | c9b1359 | 2019-11-29 11:47:47 +0100 | [diff] [blame] | 71 | if (i2c_write_raw(tpm_dev.bus, tpm_dev.addr, &addr, 1)) { |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 72 | printk(BIOS_ERR, "%s: Address write failed\n", __func__); |
Jon Murphy | db4e93b | 2023-09-05 11:38:59 -0600 | [diff] [blame] | 73 | return TPM_CB_COMMUNICATION_ERROR; |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 74 | } |
| 75 | |
| 76 | /* Wait for TPM to be ready with response data */ |
Yu-Ping Wu | ae1e702 | 2022-05-17 09:33:18 +0800 | [diff] [blame] | 77 | if (cr50_wait_tpm_ready() != CB_SUCCESS) |
Jon Murphy | db4e93b | 2023-09-05 11:38:59 -0600 | [diff] [blame] | 78 | return TPM_CB_TIMEOUT; |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 79 | |
| 80 | /* Read response data from the TPM */ |
Patrick Georgi | c9b1359 | 2019-11-29 11:47:47 +0100 | [diff] [blame] | 81 | if (i2c_read_raw(tpm_dev.bus, tpm_dev.addr, buffer, len)) { |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 82 | printk(BIOS_ERR, "%s: Read response failed\n", __func__); |
Jon Murphy | db4e93b | 2023-09-05 11:38:59 -0600 | [diff] [blame] | 83 | return TPM_CB_COMMUNICATION_ERROR; |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 84 | } |
| 85 | |
Jon Murphy | d7b8dc9 | 2023-09-05 11:36:43 -0600 | [diff] [blame] | 86 | return TPM_SUCCESS; |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 87 | } |
| 88 | |
| 89 | /* |
Duncan Laurie | 510cb6a | 2016-09-19 17:05:45 -0700 | [diff] [blame] | 90 | * cr50_i2c_write() - write to TPM register |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 91 | * |
| 92 | * @addr: register address to write to |
| 93 | * @buffer: data to write |
| 94 | * @len: number of bytes to write |
| 95 | * |
| 96 | * 1) prepend the provided address to the provided data |
| 97 | * 2) send the address+data to the TPM |
| 98 | * 3) wait for TPM to indicate it is done writing |
| 99 | * |
Jon Murphy | d7b8dc9 | 2023-09-05 11:36:43 -0600 | [diff] [blame] | 100 | * Returns TSS Return Code from TCG TPM Structures. See tss_errors.h |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 101 | */ |
Jon Murphy | d7b8dc9 | 2023-09-05 11:36:43 -0600 | [diff] [blame] | 102 | static tpm_result_t cr50_i2c_write(uint8_t addr, const uint8_t *buffer, size_t len) |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 103 | { |
Patrick Georgi | c9b1359 | 2019-11-29 11:47:47 +0100 | [diff] [blame] | 104 | if (tpm_dev.addr == 0) |
Jon Murphy | d7b8dc9 | 2023-09-05 11:36:43 -0600 | [diff] [blame] | 105 | return TPM_CB_INVALID_ARG; |
Duncan Laurie | 3727a8d | 2016-09-19 16:37:46 -0700 | [diff] [blame] | 106 | if (len > CR50_MAX_BUFSIZE) |
Jon Murphy | d7b8dc9 | 2023-09-05 11:36:43 -0600 | [diff] [blame] | 107 | return TPM_CB_INVALID_ARG; |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 108 | |
| 109 | /* Prepend the 'register address' to the buffer */ |
Patrick Georgi | c9b1359 | 2019-11-29 11:47:47 +0100 | [diff] [blame] | 110 | tpm_dev.buf[0] = addr; |
| 111 | memcpy(tpm_dev.buf + 1, buffer, len); |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 112 | |
Duncan Laurie | 94cc485 | 2016-09-19 17:22:10 -0700 | [diff] [blame] | 113 | /* Clear interrupt before starting transaction */ |
Grzegorz Bernacki | 7758b47 | 2023-06-14 12:01:32 +0000 | [diff] [blame] | 114 | cr50_plat_irq_status(); |
Duncan Laurie | 94cc485 | 2016-09-19 17:22:10 -0700 | [diff] [blame] | 115 | |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 116 | /* Send write request buffer with address */ |
Patrick Georgi | c9b1359 | 2019-11-29 11:47:47 +0100 | [diff] [blame] | 117 | if (i2c_write_raw(tpm_dev.bus, tpm_dev.addr, tpm_dev.buf, len + 1)) { |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 118 | printk(BIOS_ERR, "%s: Error writing to TPM\n", __func__); |
Jon Murphy | db4e93b | 2023-09-05 11:38:59 -0600 | [diff] [blame] | 119 | return TPM_CB_COMMUNICATION_ERROR; |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 120 | } |
| 121 | |
| 122 | /* Wait for TPM to be ready */ |
Jon Murphy | db4e93b | 2023-09-05 11:38:59 -0600 | [diff] [blame] | 123 | return cr50_wait_tpm_ready() == CB_SUCCESS ? TPM_SUCCESS : TPM_CB_TIMEOUT; |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 124 | } |
| 125 | |
Duncan Laurie | 2bc6ad3 | 2017-11-07 09:13:19 -0800 | [diff] [blame] | 126 | /* |
Martin Roth | 74f1877 | 2023-09-03 21:38:29 -0600 | [diff] [blame] | 127 | * Cr50 processes reset requests asynchronously and conceivably could be busy |
Duncan Laurie | 2bc6ad3 | 2017-11-07 09:13:19 -0800 | [diff] [blame] | 128 | * executing a long command and not reacting to the reset pulse for a while. |
| 129 | * |
| 130 | * This function will make sure that the AP does not proceed with boot until |
| 131 | * TPM finished reset processing. |
Jon Murphy | d7b8dc9 | 2023-09-05 11:36:43 -0600 | [diff] [blame] | 132 | * |
| 133 | * Returns TSS Return Code from TCG TPM Structures. See tss_errors.h |
Duncan Laurie | 2bc6ad3 | 2017-11-07 09:13:19 -0800 | [diff] [blame] | 134 | */ |
Jon Murphy | d7b8dc9 | 2023-09-05 11:36:43 -0600 | [diff] [blame] | 135 | static tpm_result_t process_reset(void) |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 136 | { |
Duncan Laurie | 2bc6ad3 | 2017-11-07 09:13:19 -0800 | [diff] [blame] | 137 | struct stopwatch sw; |
Jon Murphy | d7b8dc9 | 2023-09-05 11:36:43 -0600 | [diff] [blame] | 138 | tpm_result_t rc = TPM_SUCCESS; |
Duncan Laurie | 2bc6ad3 | 2017-11-07 09:13:19 -0800 | [diff] [blame] | 139 | uint8_t access; |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 140 | |
Duncan Laurie | 2bc6ad3 | 2017-11-07 09:13:19 -0800 | [diff] [blame] | 141 | /* |
| 142 | * Locality is released by TPM reset. |
| 143 | * |
| 144 | * If locality is taken at this point, this could be due to the fact |
| 145 | * that the TPM is performing a long operation and has not processed |
| 146 | * reset request yet. We'll wait up to CR50_TIMEOUT_INIT_MS and see if |
| 147 | * it releases locality when reset is processed. |
| 148 | */ |
| 149 | stopwatch_init_msecs_expire(&sw, CR50_TIMEOUT_INIT_MS); |
| 150 | do { |
Duncan Laurie | 2bc6ad3 | 2017-11-07 09:13:19 -0800 | [diff] [blame] | 151 | const uint8_t mask = |
| 152 | TPM_ACCESS_VALID | TPM_ACCESS_ACTIVE_LOCALITY; |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 153 | |
Jon Murphy | 2460481 | 2023-09-05 10:37:05 -0600 | [diff] [blame] | 154 | rc = cr50_i2c_read(TPM_ACCESS(0), |
Duncan Laurie | 2bc6ad3 | 2017-11-07 09:13:19 -0800 | [diff] [blame] | 155 | &access, sizeof(access)); |
Jon Murphy | 2460481 | 2023-09-05 10:37:05 -0600 | [diff] [blame] | 156 | if (rc || ((access & mask) == mask)) { |
Duncan Laurie | 2bc6ad3 | 2017-11-07 09:13:19 -0800 | [diff] [blame] | 157 | /* |
| 158 | * Don't bombard the chip with traffic, let it keep |
| 159 | * processing the command. |
| 160 | */ |
| 161 | mdelay(2); |
| 162 | continue; |
| 163 | } |
| 164 | |
Rob Barnes | d522f38 | 2022-09-12 06:31:47 -0600 | [diff] [blame] | 165 | printk(BIOS_INFO, "TPM ready after %lld ms\n", |
Duncan Laurie | 2bc6ad3 | 2017-11-07 09:13:19 -0800 | [diff] [blame] | 166 | stopwatch_duration_msecs(&sw)); |
| 167 | |
Jon Murphy | d7b8dc9 | 2023-09-05 11:36:43 -0600 | [diff] [blame] | 168 | return TPM_SUCCESS; |
Duncan Laurie | 2bc6ad3 | 2017-11-07 09:13:19 -0800 | [diff] [blame] | 169 | } while (!stopwatch_expired(&sw)); |
| 170 | |
Jon Murphy | d7b8dc9 | 2023-09-05 11:36:43 -0600 | [diff] [blame] | 171 | if (rc) { |
| 172 | printk(BIOS_ERR, "Failed to read TPM with error %d\n", rc); |
| 173 | return rc; |
| 174 | } else |
Richard Spiegel | 7c1e959 | 2018-08-09 14:41:17 -0700 | [diff] [blame] | 175 | printk(BIOS_ERR, |
Rob Barnes | d522f38 | 2022-09-12 06:31:47 -0600 | [diff] [blame] | 176 | "TPM failed to reset after %lld ms, status: %#x\n", |
Richard Spiegel | 7c1e959 | 2018-08-09 14:41:17 -0700 | [diff] [blame] | 177 | stopwatch_duration_msecs(&sw), access); |
Jon Murphy | d7b8dc9 | 2023-09-05 11:36:43 -0600 | [diff] [blame] | 178 | return TPM_CB_FAIL; |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 179 | } |
| 180 | |
Duncan Laurie | 2bc6ad3 | 2017-11-07 09:13:19 -0800 | [diff] [blame] | 181 | /* |
| 182 | * Locality could be already claimed (if this is a later coreboot stage and |
| 183 | * the RO did not release it), or not yet claimed, if this is verstage or the |
| 184 | * older RO did release it. |
Jon Murphy | d7b8dc9 | 2023-09-05 11:36:43 -0600 | [diff] [blame] | 185 | * |
| 186 | * Returns TSS Return Code from TCG TPM Structures. See tss_errors.h |
Duncan Laurie | 2bc6ad3 | 2017-11-07 09:13:19 -0800 | [diff] [blame] | 187 | */ |
Jon Murphy | d7b8dc9 | 2023-09-05 11:36:43 -0600 | [diff] [blame] | 188 | static tpm_result_t claim_locality(void) |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 189 | { |
Duncan Laurie | 2bc6ad3 | 2017-11-07 09:13:19 -0800 | [diff] [blame] | 190 | uint8_t access; |
| 191 | const uint8_t mask = TPM_ACCESS_VALID | TPM_ACCESS_ACTIVE_LOCALITY; |
Jon Murphy | d7b8dc9 | 2023-09-05 11:36:43 -0600 | [diff] [blame] | 192 | tpm_result_t rc = TPM_SUCCESS; |
Duncan Laurie | 510cb6a | 2016-09-19 17:05:45 -0700 | [diff] [blame] | 193 | |
Jon Murphy | d7b8dc9 | 2023-09-05 11:36:43 -0600 | [diff] [blame] | 194 | rc = cr50_i2c_read(TPM_ACCESS(0), &access, sizeof(access)); |
| 195 | if (rc) |
| 196 | return rc; |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 197 | |
Duncan Laurie | 2bc6ad3 | 2017-11-07 09:13:19 -0800 | [diff] [blame] | 198 | if ((access & mask) == mask) { |
| 199 | printk(BIOS_INFO, "Locality already claimed\n"); |
Jon Murphy | d7b8dc9 | 2023-09-05 11:36:43 -0600 | [diff] [blame] | 200 | return TPM_SUCCESS; |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 201 | } |
Duncan Laurie | 2bc6ad3 | 2017-11-07 09:13:19 -0800 | [diff] [blame] | 202 | |
| 203 | access = TPM_ACCESS_REQUEST_USE; |
Jon Murphy | d7b8dc9 | 2023-09-05 11:36:43 -0600 | [diff] [blame] | 204 | rc = cr50_i2c_write(TPM_ACCESS(0), |
| 205 | &access, sizeof(access)); |
| 206 | if (rc) |
| 207 | return rc; |
Duncan Laurie | 2bc6ad3 | 2017-11-07 09:13:19 -0800 | [diff] [blame] | 208 | |
Jon Murphy | d7b8dc9 | 2023-09-05 11:36:43 -0600 | [diff] [blame] | 209 | rc = cr50_i2c_read(TPM_ACCESS(0), &access, sizeof(access)); |
| 210 | if (rc) |
| 211 | return rc; |
Duncan Laurie | 2bc6ad3 | 2017-11-07 09:13:19 -0800 | [diff] [blame] | 212 | |
| 213 | if ((access & mask) != mask) { |
| 214 | printk(BIOS_INFO, "Failed to claim locality.\n"); |
Jon Murphy | d7b8dc9 | 2023-09-05 11:36:43 -0600 | [diff] [blame] | 215 | return TPM_CB_FAIL; |
Duncan Laurie | 2bc6ad3 | 2017-11-07 09:13:19 -0800 | [diff] [blame] | 216 | } |
| 217 | |
Jon Murphy | d7b8dc9 | 2023-09-05 11:36:43 -0600 | [diff] [blame] | 218 | return TPM_SUCCESS; |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 219 | } |
| 220 | |
Jon Murphy | d7b8dc9 | 2023-09-05 11:36:43 -0600 | [diff] [blame] | 221 | /* |
| 222 | * cr50 requires all 4 bytes of status register to be read |
| 223 | * |
| 224 | * Returns lowest 8-bits of the TIS Status register value |
| 225 | * see tis_status bit mask enumerated type in tis.h. |
| 226 | * Return 0 on error. |
| 227 | */ |
Sergii Dmytruk | 86f845a | 2022-10-29 18:55:24 +0300 | [diff] [blame] | 228 | static uint8_t cr50_i2c_tis_status(void) |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 229 | { |
| 230 | uint8_t buf[4]; |
Jon Murphy | d7b8dc9 | 2023-09-05 11:36:43 -0600 | [diff] [blame] | 231 | tpm_result_t rc = cr50_i2c_read(TPM_STS(tpm_dev.locality), buf, sizeof(buf)); |
| 232 | if (rc) { |
| 233 | printk(BIOS_ERR, "%s: Failed to read status with error %#x\n", __func__, rc); |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 234 | return 0; |
| 235 | } |
| 236 | return buf[0]; |
| 237 | } |
| 238 | |
| 239 | /* cr50 requires all 4 bytes of status register to be written */ |
Sergii Dmytruk | 86f845a | 2022-10-29 18:55:24 +0300 | [diff] [blame] | 240 | static void cr50_i2c_tis_ready(void) |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 241 | { |
| 242 | uint8_t buf[4] = { TPM_STS_COMMAND_READY }; |
Sergii Dmytruk | 86f845a | 2022-10-29 18:55:24 +0300 | [diff] [blame] | 243 | cr50_i2c_write(TPM_STS(tpm_dev.locality), buf, sizeof(buf)); |
Duncan Laurie | 1dc036c | 2016-09-19 16:49:23 -0700 | [diff] [blame] | 244 | mdelay(CR50_TIMEOUT_SHORT_MS); |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 245 | } |
| 246 | |
| 247 | /* cr50 uses bytes 3:2 of status register for burst count and |
Jon Murphy | d7b8dc9 | 2023-09-05 11:36:43 -0600 | [diff] [blame] | 248 | * all 4 bytes must be read |
| 249 | * |
| 250 | * Returns TSS Return Code from TCG TPM Structures. See tss_errors.h |
| 251 | */ |
| 252 | static tpm_result_t cr50_i2c_wait_burststs(uint8_t mask, size_t *burst, int *status) |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 253 | { |
| 254 | uint8_t buf[4]; |
| 255 | struct stopwatch sw; |
Jon Murphy | d7b8dc9 | 2023-09-05 11:36:43 -0600 | [diff] [blame] | 256 | tpm_result_t rc = TPM_SUCCESS; |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 257 | |
Duncan Laurie | 1dc036c | 2016-09-19 16:49:23 -0700 | [diff] [blame] | 258 | stopwatch_init_msecs_expire(&sw, CR50_TIMEOUT_LONG_MS); |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 259 | |
| 260 | while (!stopwatch_expired(&sw)) { |
Jon Murphy | d7b8dc9 | 2023-09-05 11:36:43 -0600 | [diff] [blame] | 261 | rc = cr50_i2c_read(TPM_STS(tpm_dev.locality), buf, sizeof(buf)); |
| 262 | if (rc) { |
Duncan Laurie | 1dc036c | 2016-09-19 16:49:23 -0700 | [diff] [blame] | 263 | mdelay(CR50_TIMEOUT_SHORT_MS); |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 264 | continue; |
| 265 | } |
| 266 | |
| 267 | *status = buf[0]; |
| 268 | *burst = read_le16(&buf[1]); |
| 269 | |
| 270 | /* Check if mask matches and burst is valid */ |
| 271 | if ((*status & mask) == mask && |
Duncan Laurie | 3727a8d | 2016-09-19 16:37:46 -0700 | [diff] [blame] | 272 | *burst > 0 && *burst <= CR50_MAX_BUFSIZE) |
Jon Murphy | d7b8dc9 | 2023-09-05 11:36:43 -0600 | [diff] [blame] | 273 | return TPM_SUCCESS; |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 274 | |
Duncan Laurie | 1dc036c | 2016-09-19 16:49:23 -0700 | [diff] [blame] | 275 | mdelay(CR50_TIMEOUT_SHORT_MS); |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 276 | } |
Jon Murphy | d7b8dc9 | 2023-09-05 11:36:43 -0600 | [diff] [blame] | 277 | printk(BIOS_ERR, "%s: Timeout reading burst and status with error %#x\n", __func__, rc); |
| 278 | if (rc) |
| 279 | return rc; |
Jon Murphy | db4e93b | 2023-09-05 11:38:59 -0600 | [diff] [blame] | 280 | return TPM_CB_COMMUNICATION_ERROR; |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 281 | } |
| 282 | |
Sergii Dmytruk | 86f845a | 2022-10-29 18:55:24 +0300 | [diff] [blame] | 283 | static int cr50_i2c_tis_recv(uint8_t *buf, size_t buf_len) |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 284 | { |
| 285 | size_t burstcnt, current, len, expected; |
Sergii Dmytruk | 86f845a | 2022-10-29 18:55:24 +0300 | [diff] [blame] | 286 | uint8_t addr = TPM_DATA_FIFO(tpm_dev.locality); |
Duncan Laurie | f235a9b | 2016-09-19 17:19:10 -0700 | [diff] [blame] | 287 | uint8_t mask = TPM_STS_VALID | TPM_STS_DATA_AVAIL; |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 288 | int status; |
Jon Murphy | d7b8dc9 | 2023-09-05 11:36:43 -0600 | [diff] [blame] | 289 | tpm_result_t rc = TPM_SUCCESS; |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 290 | |
| 291 | if (buf_len < TPM_HEADER_SIZE) |
Duncan Laurie | f235a9b | 2016-09-19 17:19:10 -0700 | [diff] [blame] | 292 | goto out_err; |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 293 | |
Jon Murphy | d7b8dc9 | 2023-09-05 11:36:43 -0600 | [diff] [blame] | 294 | rc = cr50_i2c_wait_burststs(mask, &burstcnt, &status); |
| 295 | if (rc) { |
| 296 | printk(BIOS_ERR, "%s: First chunk not available with error %#x\n", __func__, rc); |
Duncan Laurie | f235a9b | 2016-09-19 17:19:10 -0700 | [diff] [blame] | 297 | goto out_err; |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 298 | } |
| 299 | |
| 300 | /* Read first chunk of burstcnt bytes */ |
Jon Murphy | d7b8dc9 | 2023-09-05 11:36:43 -0600 | [diff] [blame] | 301 | rc = cr50_i2c_read(addr, buf, burstcnt); |
| 302 | if (rc) { |
| 303 | printk(BIOS_ERR, "%s: Read failed with error %#x\n", __func__, rc); |
Duncan Laurie | f235a9b | 2016-09-19 17:19:10 -0700 | [diff] [blame] | 304 | goto out_err; |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 305 | } |
| 306 | |
| 307 | /* Determine expected data in the return buffer */ |
| 308 | expected = read_be32(buf + TPM_RSP_SIZE_BYTE); |
| 309 | if (expected > buf_len) { |
| 310 | printk(BIOS_ERR, "%s: Too much data: %zu > %zu\n", |
| 311 | __func__, expected, buf_len); |
Duncan Laurie | f235a9b | 2016-09-19 17:19:10 -0700 | [diff] [blame] | 312 | goto out_err; |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 313 | } |
| 314 | |
| 315 | /* Now read the rest of the data */ |
| 316 | current = burstcnt; |
| 317 | while (current < expected) { |
| 318 | /* Read updated burst count and check status */ |
Jon Murphy | d7b8dc9 | 2023-09-05 11:36:43 -0600 | [diff] [blame] | 319 | if (cr50_i2c_wait_burststs(mask, &burstcnt, &status)) |
Duncan Laurie | f235a9b | 2016-09-19 17:19:10 -0700 | [diff] [blame] | 320 | goto out_err; |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 321 | |
Elyes HAOUAS | 361a935 | 2019-12-18 21:26:33 +0100 | [diff] [blame] | 322 | len = MIN(burstcnt, expected - current); |
Jon Murphy | d7b8dc9 | 2023-09-05 11:36:43 -0600 | [diff] [blame] | 323 | rc = cr50_i2c_read(addr, buf + current, len); |
| 324 | if (rc) { |
| 325 | printk(BIOS_ERR, "%s: Read failed with error %#x\n", __func__, rc); |
Duncan Laurie | f235a9b | 2016-09-19 17:19:10 -0700 | [diff] [blame] | 326 | goto out_err; |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 327 | } |
| 328 | |
| 329 | current += len; |
| 330 | } |
| 331 | |
| 332 | /* Ensure TPM is done reading data */ |
Jon Murphy | d7b8dc9 | 2023-09-05 11:36:43 -0600 | [diff] [blame] | 333 | if (cr50_i2c_wait_burststs(TPM_STS_VALID, &burstcnt, &status)) |
Duncan Laurie | f235a9b | 2016-09-19 17:19:10 -0700 | [diff] [blame] | 334 | goto out_err; |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 335 | if (status & TPM_STS_DATA_AVAIL) { |
| 336 | printk(BIOS_ERR, "%s: Data still available\n", __func__); |
Duncan Laurie | f235a9b | 2016-09-19 17:19:10 -0700 | [diff] [blame] | 337 | goto out_err; |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 338 | } |
| 339 | |
Duncan Laurie | f235a9b | 2016-09-19 17:19:10 -0700 | [diff] [blame] | 340 | return current; |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 341 | |
Duncan Laurie | f235a9b | 2016-09-19 17:19:10 -0700 | [diff] [blame] | 342 | out_err: |
| 343 | /* Abort current transaction if still pending */ |
Sergii Dmytruk | 86f845a | 2022-10-29 18:55:24 +0300 | [diff] [blame] | 344 | if (cr50_i2c_tis_status() & TPM_STS_COMMAND_READY) |
| 345 | cr50_i2c_tis_ready(); |
Duncan Laurie | f235a9b | 2016-09-19 17:19:10 -0700 | [diff] [blame] | 346 | return -1; |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 347 | } |
| 348 | |
Sergii Dmytruk | 86f845a | 2022-10-29 18:55:24 +0300 | [diff] [blame] | 349 | static int cr50_i2c_tis_send(uint8_t *buf, size_t len) |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 350 | { |
| 351 | int status; |
| 352 | size_t burstcnt, limit, sent = 0; |
| 353 | uint8_t tpm_go[4] = { TPM_STS_GO }; |
| 354 | struct stopwatch sw; |
Jon Murphy | d7b8dc9 | 2023-09-05 11:36:43 -0600 | [diff] [blame] | 355 | tpm_result_t rc = TPM_SUCCESS; |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 356 | |
Duncan Laurie | 1dc036c | 2016-09-19 16:49:23 -0700 | [diff] [blame] | 357 | stopwatch_init_msecs_expire(&sw, CR50_TIMEOUT_LONG_MS); |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 358 | |
| 359 | /* Wait until TPM is ready for a command */ |
Sergii Dmytruk | 86f845a | 2022-10-29 18:55:24 +0300 | [diff] [blame] | 360 | while (!(cr50_i2c_tis_status() & TPM_STS_COMMAND_READY)) { |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 361 | if (stopwatch_expired(&sw)) { |
| 362 | printk(BIOS_ERR, "%s: Command ready timeout\n", |
| 363 | __func__); |
| 364 | return -1; |
| 365 | } |
| 366 | |
Sergii Dmytruk | 86f845a | 2022-10-29 18:55:24 +0300 | [diff] [blame] | 367 | cr50_i2c_tis_ready(); |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 368 | } |
| 369 | |
| 370 | while (len > 0) { |
Duncan Laurie | f235a9b | 2016-09-19 17:19:10 -0700 | [diff] [blame] | 371 | uint8_t mask = TPM_STS_VALID; |
| 372 | |
| 373 | /* Wait for data if this is not the first chunk */ |
| 374 | if (sent > 0) |
| 375 | mask |= TPM_STS_DATA_EXPECT; |
| 376 | |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 377 | /* Read burst count and check status */ |
Jon Murphy | d7b8dc9 | 2023-09-05 11:36:43 -0600 | [diff] [blame] | 378 | if (cr50_i2c_wait_burststs(mask, &burstcnt, &status)) |
Duncan Laurie | f235a9b | 2016-09-19 17:19:10 -0700 | [diff] [blame] | 379 | goto out_err; |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 380 | |
| 381 | /* Use burstcnt - 1 to account for the address byte |
Duncan Laurie | 510cb6a | 2016-09-19 17:05:45 -0700 | [diff] [blame] | 382 | * that is inserted by cr50_i2c_write() */ |
Elyes HAOUAS | 361a935 | 2019-12-18 21:26:33 +0100 | [diff] [blame] | 383 | limit = MIN(burstcnt - 1, len); |
Jon Murphy | d7b8dc9 | 2023-09-05 11:36:43 -0600 | [diff] [blame] | 384 | rc = cr50_i2c_write(TPM_DATA_FIFO(tpm_dev.locality), &buf[sent], limit); |
| 385 | if (rc) { |
| 386 | printk(BIOS_ERR, "%s: Write failed with error %#x\n", __func__, rc); |
Duncan Laurie | f235a9b | 2016-09-19 17:19:10 -0700 | [diff] [blame] | 387 | goto out_err; |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 388 | } |
| 389 | |
| 390 | sent += limit; |
| 391 | len -= limit; |
| 392 | } |
| 393 | |
| 394 | /* Ensure TPM is not expecting more data */ |
Jon Murphy | d7b8dc9 | 2023-09-05 11:36:43 -0600 | [diff] [blame] | 395 | if (cr50_i2c_wait_burststs(TPM_STS_VALID, &burstcnt, &status)) |
Duncan Laurie | f235a9b | 2016-09-19 17:19:10 -0700 | [diff] [blame] | 396 | goto out_err; |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 397 | if (status & TPM_STS_DATA_EXPECT) { |
| 398 | printk(BIOS_ERR, "%s: Data still expected\n", __func__); |
Duncan Laurie | f235a9b | 2016-09-19 17:19:10 -0700 | [diff] [blame] | 399 | goto out_err; |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 400 | } |
| 401 | |
| 402 | /* Start the TPM command */ |
Jon Murphy | d7b8dc9 | 2023-09-05 11:36:43 -0600 | [diff] [blame] | 403 | rc = cr50_i2c_write(TPM_STS(tpm_dev.locality), tpm_go, sizeof(tpm_go)); |
| 404 | if (rc) { |
| 405 | printk(BIOS_ERR, "%s: Start command failed with error %#x\n", __func__, rc); |
Duncan Laurie | f235a9b | 2016-09-19 17:19:10 -0700 | [diff] [blame] | 406 | goto out_err; |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 407 | } |
| 408 | return sent; |
| 409 | |
Duncan Laurie | f235a9b | 2016-09-19 17:19:10 -0700 | [diff] [blame] | 410 | out_err: |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 411 | /* Abort current transaction if still pending */ |
Sergii Dmytruk | 86f845a | 2022-10-29 18:55:24 +0300 | [diff] [blame] | 412 | if (cr50_i2c_tis_status() & TPM_STS_COMMAND_READY) |
| 413 | cr50_i2c_tis_ready(); |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 414 | return -1; |
| 415 | } |
| 416 | |
| 417 | static void cr50_vendor_init(struct tpm_chip *chip) |
| 418 | { |
Sergii Dmytruk | 86f845a | 2022-10-29 18:55:24 +0300 | [diff] [blame] | 419 | chip->req_complete_mask = TPM_STS_DATA_AVAIL | TPM_STS_VALID; |
| 420 | chip->req_complete_val = TPM_STS_DATA_AVAIL | TPM_STS_VALID; |
| 421 | chip->req_canceled = TPM_STS_COMMAND_READY; |
| 422 | chip->status = &cr50_i2c_tis_status; |
| 423 | chip->recv = &cr50_i2c_tis_recv; |
| 424 | chip->send = &cr50_i2c_tis_send; |
| 425 | chip->cancel = &cr50_i2c_tis_ready; |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 426 | } |
| 427 | |
Sergii Dmytruk | febf9b9 | 2022-10-31 15:30:15 +0200 | [diff] [blame] | 428 | tpm_result_t tpm_vendor_probe(unsigned int bus, uint32_t addr, enum tpm_family *family) |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 429 | { |
Sergii Dmytruk | febf9b9 | 2022-10-31 15:30:15 +0200 | [diff] [blame] | 430 | /* cr50 is TPM2 */ |
| 431 | if (family != NULL) |
| 432 | *family = TPM_2; |
Jon Murphy | d7b8dc9 | 2023-09-05 11:36:43 -0600 | [diff] [blame] | 433 | return TPM_SUCCESS; |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 434 | } |
| 435 | |
Jon Murphy | d7b8dc9 | 2023-09-05 11:36:43 -0600 | [diff] [blame] | 436 | static tpm_result_t cr50_i2c_probe(uint32_t *did_vid) |
Keith Short | 5143635 | 2018-12-17 14:21:46 -0700 | [diff] [blame] | 437 | { |
| 438 | int retries; |
Jon Murphy | d7b8dc9 | 2023-09-05 11:36:43 -0600 | [diff] [blame] | 439 | tpm_result_t rc = TPM_SUCCESS; |
Keith Short | 5143635 | 2018-12-17 14:21:46 -0700 | [diff] [blame] | 440 | |
| 441 | /* |
Rob Barnes | 22372f4 | 2022-02-11 07:59:21 -0700 | [diff] [blame] | 442 | * 1s should be enough to synchronize with the TPM even under the |
Keith Short | 5143635 | 2018-12-17 14:21:46 -0700 | [diff] [blame] | 443 | * worst nested reset request conditions. In vast majority of cases |
Rob Barnes | 22372f4 | 2022-02-11 07:59:21 -0700 | [diff] [blame] | 444 | * there would be no wait at all. If this probe fails, boot likely |
| 445 | * cannot proceed, so an extra long timeout is appropriate. |
Keith Short | 5143635 | 2018-12-17 14:21:46 -0700 | [diff] [blame] | 446 | */ |
| 447 | printk(BIOS_INFO, "Probing TPM I2C: "); |
| 448 | |
Rob Barnes | 22372f4 | 2022-02-11 07:59:21 -0700 | [diff] [blame] | 449 | for (retries = 100; retries > 0; retries--) { |
Tim Wawrzynczak | eb1891a | 2022-02-08 12:49:31 -0700 | [diff] [blame] | 450 | rc = cr50_i2c_read(TPM_DID_VID(0), (uint8_t *)did_vid, 4); |
Keith Short | 5143635 | 2018-12-17 14:21:46 -0700 | [diff] [blame] | 451 | |
| 452 | /* Exit once DID and VID verified */ |
Jett Rink | d41ad72 | 2024-06-10 09:31:14 -0600 | [diff] [blame^] | 453 | if (!rc && (*did_vid == CR50_DID_VID || *did_vid == TI50_DT_DID_VID || |
| 454 | *did_vid == TI50_OT_DID_VID)) { |
Keith Short | 5143635 | 2018-12-17 14:21:46 -0700 | [diff] [blame] | 455 | printk(BIOS_INFO, "done! DID_VID 0x%08x\n", *did_vid); |
Jon Murphy | d7b8dc9 | 2023-09-05 11:36:43 -0600 | [diff] [blame] | 456 | return TPM_SUCCESS; |
Keith Short | 5143635 | 2018-12-17 14:21:46 -0700 | [diff] [blame] | 457 | } |
| 458 | |
| 459 | /* TPM might be resetting, let's retry in a bit. */ |
| 460 | mdelay(10); |
| 461 | printk(BIOS_INFO, "."); |
| 462 | } |
| 463 | |
| 464 | /* |
| 465 | * I2C reads failed, or the DID and VID didn't match |
| 466 | */ |
Jon Murphy | d7b8dc9 | 2023-09-05 11:36:43 -0600 | [diff] [blame] | 467 | if (!rc) { |
| 468 | printk(BIOS_ERR, "DID_VID 0x%08x not recognized\n", *did_vid); |
| 469 | return TPM_CB_FAIL; |
| 470 | } |
Jon Murphy | db4e93b | 2023-09-05 11:38:59 -0600 | [diff] [blame] | 471 | return TPM_CB_COMMUNICATION_ERROR; |
Keith Short | 5143635 | 2018-12-17 14:21:46 -0700 | [diff] [blame] | 472 | } |
| 473 | |
Jon Murphy | d7b8dc9 | 2023-09-05 11:36:43 -0600 | [diff] [blame] | 474 | tpm_result_t tpm_vendor_init(struct tpm_chip *chip, unsigned int bus, uint32_t dev_addr) |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 475 | { |
Keith Short | 5143635 | 2018-12-17 14:21:46 -0700 | [diff] [blame] | 476 | uint32_t did_vid = 0; |
Jon Murphy | d7b8dc9 | 2023-09-05 11:36:43 -0600 | [diff] [blame] | 477 | tpm_result_t rc = TPM_SUCCESS; |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 478 | |
| 479 | if (dev_addr == 0) { |
| 480 | printk(BIOS_ERR, "%s: missing device address\n", __func__); |
Jon Murphy | db4e93b | 2023-09-05 11:38:59 -0600 | [diff] [blame] | 481 | return TPM_CB_INVALID_ARG; |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 482 | } |
| 483 | |
Patrick Georgi | c9b1359 | 2019-11-29 11:47:47 +0100 | [diff] [blame] | 484 | tpm_dev.bus = bus; |
| 485 | tpm_dev.addr = dev_addr; |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 486 | |
| 487 | cr50_vendor_init(chip); |
| 488 | |
Jon Murphy | d7b8dc9 | 2023-09-05 11:36:43 -0600 | [diff] [blame] | 489 | rc = cr50_i2c_probe(&did_vid); |
| 490 | if (rc) |
| 491 | return rc; |
Keith Short | 5143635 | 2018-12-17 14:21:46 -0700 | [diff] [blame] | 492 | |
Jon Murphy | d7b8dc9 | 2023-09-05 11:36:43 -0600 | [diff] [blame] | 493 | if (ENV_SEPARATE_VERSTAGE || ENV_BOOTBLOCK) { |
| 494 | rc = process_reset(); |
| 495 | if (rc) |
| 496 | return rc; |
| 497 | } |
Duncan Laurie | 2bc6ad3 | 2017-11-07 09:13:19 -0800 | [diff] [blame] | 498 | |
Jon Murphy | d7b8dc9 | 2023-09-05 11:36:43 -0600 | [diff] [blame] | 499 | rc = claim_locality(); |
| 500 | if (rc) |
| 501 | return rc; |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 502 | |
Tyler Wang | 557aad1 | 2024-05-14 14:07:02 +0800 | [diff] [blame] | 503 | printk(BIOS_DEBUG, "GSC TPM 2.0 (i2c %u:0x%02x id %#x)\n", |
Keith Short | 5143635 | 2018-12-17 14:21:46 -0700 | [diff] [blame] | 504 | bus, dev_addr, did_vid >> 16); |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 505 | |
Jes Klinke | 1430b04 | 2022-03-28 14:22:24 -0700 | [diff] [blame] | 506 | if (tpm_first_access_this_boot()) { |
Tim Wawrzynczak | 1e50dfb | 2022-02-16 13:48:07 -0700 | [diff] [blame] | 507 | /* This is called for the side-effect of printing the version string. */ |
Jes Klinke | 1430b04 | 2022-03-28 14:22:24 -0700 | [diff] [blame] | 508 | cr50_get_firmware_version(NULL); |
| 509 | cr50_set_board_cfg(); |
Tim Wawrzynczak | 1e50dfb | 2022-02-16 13:48:07 -0700 | [diff] [blame] | 510 | } |
| 511 | |
Jon Murphy | d7b8dc9 | 2023-09-05 11:36:43 -0600 | [diff] [blame] | 512 | return TPM_SUCCESS; |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 513 | } |
| 514 | |
Subrata Banik | 60b2ab8 | 2022-03-09 12:55:34 +0530 | [diff] [blame] | 515 | enum cb_err tis_vendor_write(unsigned int addr, const void *buffer, size_t bytes) |
Tim Wawrzynczak | 1e50dfb | 2022-02-16 13:48:07 -0700 | [diff] [blame] | 516 | { |
| 517 | return cr50_i2c_write(addr & 0xff, buffer, bytes) ? CB_ERR : CB_SUCCESS; |
| 518 | } |
| 519 | |
Subrata Banik | 60b2ab8 | 2022-03-09 12:55:34 +0530 | [diff] [blame] | 520 | enum cb_err tis_vendor_read(unsigned int addr, void *buffer, size_t bytes) |
Tim Wawrzynczak | 1e50dfb | 2022-02-16 13:48:07 -0700 | [diff] [blame] | 521 | { |
| 522 | return cr50_i2c_read(addr & 0xff, buffer, bytes) ? CB_ERR : CB_SUCCESS; |
| 523 | } |