Patrick Georgi | ac95903 | 2020-05-05 22:49:26 +0200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 2 | |
Martin Roth | cddd600 | 2019-09-23 17:38:27 -0600 | [diff] [blame] | 3 | /* Based on Linux Kernel TPM driver */ |
| 4 | |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 5 | /* |
Martin Roth | 0949e73 | 2021-10-01 14:28:22 -0600 | [diff] [blame] | 6 | * cr50 is a TPM 2.0 capable device that requires special |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 7 | * handling for the I2C interface. |
| 8 | * |
| 9 | * - Use an interrupt for transaction status instead of hardcoded delays |
| 10 | * - Must use write+wait+read read protocol |
| 11 | * - All 4 bytes of status register must be read/written at once |
| 12 | * - Burst count max is 63 bytes, and burst count behaves |
| 13 | * slightly differently than other I2C TPMs |
| 14 | * - When reading from FIFO the full burstcnt must be read |
| 15 | * instead of just reading header and determining the remainder |
| 16 | */ |
| 17 | |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 18 | #include <commonlib/endian.h> |
Elyes HAOUAS | 361a935 | 2019-12-18 21:26:33 +0100 | [diff] [blame] | 19 | #include <commonlib/helpers.h> |
Tim Wawrzynczak | 1e50dfb | 2022-02-16 13:48:07 -0700 | [diff] [blame] | 20 | #include <console/console.h> |
| 21 | #include <delay.h> |
| 22 | #include <device/i2c_simple.h> |
| 23 | #include <drivers/tpm/cr50.h> |
| 24 | #include <endian.h> |
| 25 | #include <security/tpm/tis.h> |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 26 | #include <string.h> |
| 27 | #include <types.h> |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 28 | #include <timer.h> |
Elyes HAOUAS | ede8dd0 | 2019-06-23 06:57:53 +0200 | [diff] [blame] | 29 | |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 30 | #include "tpm.h" |
| 31 | |
Duncan Laurie | 3727a8d | 2016-09-19 16:37:46 -0700 | [diff] [blame] | 32 | #define CR50_MAX_BUFSIZE 63 |
Duncan Laurie | 469af7b | 2017-11-07 09:13:19 -0800 | [diff] [blame] | 33 | #define CR50_TIMEOUT_INIT_MS 30000 /* Very long timeout for TPM init */ |
Duncan Laurie | 1dc036c | 2016-09-19 16:49:23 -0700 | [diff] [blame] | 34 | #define CR50_TIMEOUT_LONG_MS 2000 /* Long timeout while waiting for TPM */ |
| 35 | #define CR50_TIMEOUT_SHORT_MS 2 /* Short timeout during transactions */ |
Duncan Laurie | ed4fa09 | 2016-11-01 15:03:13 -0700 | [diff] [blame] | 36 | #define CR50_TIMEOUT_NOIRQ_MS 20 /* Timeout for TPM ready without IRQ */ |
| 37 | #define CR50_TIMEOUT_IRQ_MS 100 /* Timeout for TPM ready with IRQ */ |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 38 | #define CR50_DID_VID 0x00281ae0L |
Jes Klinke | 1430b04 | 2022-03-28 14:22:24 -0700 | [diff] [blame^] | 39 | #define TI50_DID_VID 0x504a6666L |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 40 | |
| 41 | struct tpm_inf_dev { |
| 42 | int bus; |
| 43 | unsigned int addr; |
Duncan Laurie | 3727a8d | 2016-09-19 16:37:46 -0700 | [diff] [blame] | 44 | uint8_t buf[CR50_MAX_BUFSIZE + sizeof(uint8_t)]; |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 45 | }; |
| 46 | |
Patrick Georgi | c9b1359 | 2019-11-29 11:47:47 +0100 | [diff] [blame] | 47 | static struct tpm_inf_dev tpm_dev; |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 48 | |
Aaron Durbin | 6403167 | 2018-04-21 14:45:32 -0600 | [diff] [blame] | 49 | __weak int tis_plat_irq_status(void) |
Daniel Kurtz | c4852e7 | 2017-04-21 14:11:51 +0800 | [diff] [blame] | 50 | { |
Arthur Heymans | 0ca944b | 2019-11-20 19:51:06 +0100 | [diff] [blame] | 51 | static int warning_displayed; |
Daniel Kurtz | c4852e7 | 2017-04-21 14:11:51 +0800 | [diff] [blame] | 52 | |
Arthur Heymans | 0ca944b | 2019-11-20 19:51:06 +0100 | [diff] [blame] | 53 | if (!warning_displayed) { |
Julius Werner | e966595 | 2022-01-21 17:06:20 -0800 | [diff] [blame] | 54 | printk(BIOS_WARNING, "%s() not implemented, wasting 20ms to wait on" |
Elyes HAOUAS | 5201665 | 2021-01-16 17:29:49 +0100 | [diff] [blame] | 55 | " Cr50!\n", __func__); |
Arthur Heymans | 0ca944b | 2019-11-20 19:51:06 +0100 | [diff] [blame] | 56 | warning_displayed = 1; |
Daniel Kurtz | c4852e7 | 2017-04-21 14:11:51 +0800 | [diff] [blame] | 57 | } |
| 58 | mdelay(CR50_TIMEOUT_NOIRQ_MS); |
| 59 | |
| 60 | return 1; |
| 61 | } |
| 62 | |
Duncan Laurie | 94cc485 | 2016-09-19 17:22:10 -0700 | [diff] [blame] | 63 | /* Wait for interrupt to indicate the TPM is ready */ |
Tim Wawrzynczak | eb1891a | 2022-02-08 12:49:31 -0700 | [diff] [blame] | 64 | static int cr50_i2c_wait_tpm_ready(void) |
Duncan Laurie | 94cc485 | 2016-09-19 17:22:10 -0700 | [diff] [blame] | 65 | { |
| 66 | struct stopwatch sw; |
| 67 | |
Duncan Laurie | ed4fa09 | 2016-11-01 15:03:13 -0700 | [diff] [blame] | 68 | stopwatch_init_msecs_expire(&sw, CR50_TIMEOUT_IRQ_MS); |
Duncan Laurie | 94cc485 | 2016-09-19 17:22:10 -0700 | [diff] [blame] | 69 | |
Daniel Kurtz | c4852e7 | 2017-04-21 14:11:51 +0800 | [diff] [blame] | 70 | while (!tis_plat_irq_status()) |
Vadim Bendebury | c7fc199 | 2019-11-26 14:08:59 -0800 | [diff] [blame] | 71 | if (stopwatch_expired(&sw)) { |
| 72 | printk(BIOS_ERR, "Cr50 i2c TPM IRQ timeout!\n"); |
Duncan Laurie | 94cc485 | 2016-09-19 17:22:10 -0700 | [diff] [blame] | 73 | return -1; |
Vadim Bendebury | c7fc199 | 2019-11-26 14:08:59 -0800 | [diff] [blame] | 74 | } |
Duncan Laurie | 94cc485 | 2016-09-19 17:22:10 -0700 | [diff] [blame] | 75 | return 0; |
| 76 | } |
| 77 | |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 78 | /* |
Duncan Laurie | 510cb6a | 2016-09-19 17:05:45 -0700 | [diff] [blame] | 79 | * cr50_i2c_read() - read from TPM register |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 80 | * |
| 81 | * @addr: register address to read from |
| 82 | * @buffer: provided by caller |
| 83 | * @len: number of bytes to read |
| 84 | * |
| 85 | * 1) send register address byte 'addr' to the TPM |
| 86 | * 2) wait for TPM to indicate it is ready |
| 87 | * 3) read 'len' bytes of TPM response into the provided 'buffer' |
| 88 | * |
| 89 | * Return -1 on error, 0 on success. |
| 90 | */ |
Tim Wawrzynczak | eb1891a | 2022-02-08 12:49:31 -0700 | [diff] [blame] | 91 | static int cr50_i2c_read(uint8_t addr, uint8_t *buffer, size_t len) |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 92 | { |
Patrick Georgi | c9b1359 | 2019-11-29 11:47:47 +0100 | [diff] [blame] | 93 | if (tpm_dev.addr == 0) |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 94 | return -1; |
| 95 | |
Duncan Laurie | 94cc485 | 2016-09-19 17:22:10 -0700 | [diff] [blame] | 96 | /* Clear interrupt before starting transaction */ |
Daniel Kurtz | c4852e7 | 2017-04-21 14:11:51 +0800 | [diff] [blame] | 97 | tis_plat_irq_status(); |
Duncan Laurie | 94cc485 | 2016-09-19 17:22:10 -0700 | [diff] [blame] | 98 | |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 99 | /* Send the register address byte to the TPM */ |
Patrick Georgi | c9b1359 | 2019-11-29 11:47:47 +0100 | [diff] [blame] | 100 | if (i2c_write_raw(tpm_dev.bus, tpm_dev.addr, &addr, 1)) { |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 101 | printk(BIOS_ERR, "%s: Address write failed\n", __func__); |
| 102 | return -1; |
| 103 | } |
| 104 | |
| 105 | /* Wait for TPM to be ready with response data */ |
Tim Wawrzynczak | eb1891a | 2022-02-08 12:49:31 -0700 | [diff] [blame] | 106 | if (cr50_i2c_wait_tpm_ready() < 0) |
Duncan Laurie | 94cc485 | 2016-09-19 17:22:10 -0700 | [diff] [blame] | 107 | return -1; |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 108 | |
| 109 | /* Read response data from the TPM */ |
Patrick Georgi | c9b1359 | 2019-11-29 11:47:47 +0100 | [diff] [blame] | 110 | if (i2c_read_raw(tpm_dev.bus, tpm_dev.addr, buffer, len)) { |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 111 | printk(BIOS_ERR, "%s: Read response failed\n", __func__); |
| 112 | return -1; |
| 113 | } |
| 114 | |
| 115 | return 0; |
| 116 | } |
| 117 | |
| 118 | /* |
Duncan Laurie | 510cb6a | 2016-09-19 17:05:45 -0700 | [diff] [blame] | 119 | * cr50_i2c_write() - write to TPM register |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 120 | * |
| 121 | * @addr: register address to write to |
| 122 | * @buffer: data to write |
| 123 | * @len: number of bytes to write |
| 124 | * |
| 125 | * 1) prepend the provided address to the provided data |
| 126 | * 2) send the address+data to the TPM |
| 127 | * 3) wait for TPM to indicate it is done writing |
| 128 | * |
| 129 | * Returns -1 on error, 0 on success. |
| 130 | */ |
Tim Wawrzynczak | 1e50dfb | 2022-02-16 13:48:07 -0700 | [diff] [blame] | 131 | static int cr50_i2c_write(uint8_t addr, const uint8_t *buffer, size_t len) |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 132 | { |
Patrick Georgi | c9b1359 | 2019-11-29 11:47:47 +0100 | [diff] [blame] | 133 | if (tpm_dev.addr == 0) |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 134 | return -1; |
Duncan Laurie | 3727a8d | 2016-09-19 16:37:46 -0700 | [diff] [blame] | 135 | if (len > CR50_MAX_BUFSIZE) |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 136 | return -1; |
| 137 | |
| 138 | /* Prepend the 'register address' to the buffer */ |
Patrick Georgi | c9b1359 | 2019-11-29 11:47:47 +0100 | [diff] [blame] | 139 | tpm_dev.buf[0] = addr; |
| 140 | memcpy(tpm_dev.buf + 1, buffer, len); |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 141 | |
Duncan Laurie | 94cc485 | 2016-09-19 17:22:10 -0700 | [diff] [blame] | 142 | /* Clear interrupt before starting transaction */ |
Daniel Kurtz | c4852e7 | 2017-04-21 14:11:51 +0800 | [diff] [blame] | 143 | tis_plat_irq_status(); |
Duncan Laurie | 94cc485 | 2016-09-19 17:22:10 -0700 | [diff] [blame] | 144 | |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 145 | /* Send write request buffer with address */ |
Patrick Georgi | c9b1359 | 2019-11-29 11:47:47 +0100 | [diff] [blame] | 146 | if (i2c_write_raw(tpm_dev.bus, tpm_dev.addr, tpm_dev.buf, len + 1)) { |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 147 | printk(BIOS_ERR, "%s: Error writing to TPM\n", __func__); |
| 148 | return -1; |
| 149 | } |
| 150 | |
| 151 | /* Wait for TPM to be ready */ |
Tim Wawrzynczak | eb1891a | 2022-02-08 12:49:31 -0700 | [diff] [blame] | 152 | return cr50_i2c_wait_tpm_ready(); |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 153 | } |
| 154 | |
Duncan Laurie | 2bc6ad3 | 2017-11-07 09:13:19 -0800 | [diff] [blame] | 155 | /* |
| 156 | * Cr50 processes reset requests asynchronously and consceivably could be busy |
| 157 | * executing a long command and not reacting to the reset pulse for a while. |
| 158 | * |
| 159 | * This function will make sure that the AP does not proceed with boot until |
| 160 | * TPM finished reset processing. |
| 161 | */ |
Tim Wawrzynczak | eb1891a | 2022-02-08 12:49:31 -0700 | [diff] [blame] | 162 | static int process_reset(void) |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 163 | { |
Duncan Laurie | 2bc6ad3 | 2017-11-07 09:13:19 -0800 | [diff] [blame] | 164 | struct stopwatch sw; |
Richard Spiegel | 7c1e959 | 2018-08-09 14:41:17 -0700 | [diff] [blame] | 165 | int rv = 0; |
Duncan Laurie | 2bc6ad3 | 2017-11-07 09:13:19 -0800 | [diff] [blame] | 166 | uint8_t access; |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 167 | |
Duncan Laurie | 2bc6ad3 | 2017-11-07 09:13:19 -0800 | [diff] [blame] | 168 | /* |
| 169 | * Locality is released by TPM reset. |
| 170 | * |
| 171 | * If locality is taken at this point, this could be due to the fact |
| 172 | * that the TPM is performing a long operation and has not processed |
| 173 | * reset request yet. We'll wait up to CR50_TIMEOUT_INIT_MS and see if |
| 174 | * it releases locality when reset is processed. |
| 175 | */ |
| 176 | stopwatch_init_msecs_expire(&sw, CR50_TIMEOUT_INIT_MS); |
| 177 | do { |
Duncan Laurie | 2bc6ad3 | 2017-11-07 09:13:19 -0800 | [diff] [blame] | 178 | const uint8_t mask = |
| 179 | TPM_ACCESS_VALID | TPM_ACCESS_ACTIVE_LOCALITY; |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 180 | |
Tim Wawrzynczak | eb1891a | 2022-02-08 12:49:31 -0700 | [diff] [blame] | 181 | rv = cr50_i2c_read(TPM_ACCESS(0), |
Duncan Laurie | 2bc6ad3 | 2017-11-07 09:13:19 -0800 | [diff] [blame] | 182 | &access, sizeof(access)); |
| 183 | if (rv || ((access & mask) == mask)) { |
| 184 | /* |
| 185 | * Don't bombard the chip with traffic, let it keep |
| 186 | * processing the command. |
| 187 | */ |
| 188 | mdelay(2); |
| 189 | continue; |
| 190 | } |
| 191 | |
| 192 | printk(BIOS_INFO, "TPM ready after %ld ms\n", |
| 193 | stopwatch_duration_msecs(&sw)); |
| 194 | |
| 195 | return 0; |
| 196 | } while (!stopwatch_expired(&sw)); |
| 197 | |
Richard Spiegel | 7c1e959 | 2018-08-09 14:41:17 -0700 | [diff] [blame] | 198 | if (rv) |
| 199 | printk(BIOS_ERR, "Failed to read TPM\n"); |
| 200 | else |
| 201 | printk(BIOS_ERR, |
| 202 | "TPM failed to reset after %ld ms, status: %#x\n", |
| 203 | stopwatch_duration_msecs(&sw), access); |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 204 | |
| 205 | return -1; |
| 206 | } |
| 207 | |
Duncan Laurie | 2bc6ad3 | 2017-11-07 09:13:19 -0800 | [diff] [blame] | 208 | /* |
| 209 | * Locality could be already claimed (if this is a later coreboot stage and |
| 210 | * the RO did not release it), or not yet claimed, if this is verstage or the |
| 211 | * older RO did release it. |
| 212 | */ |
Tim Wawrzynczak | eb1891a | 2022-02-08 12:49:31 -0700 | [diff] [blame] | 213 | static int claim_locality(void) |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 214 | { |
Duncan Laurie | 2bc6ad3 | 2017-11-07 09:13:19 -0800 | [diff] [blame] | 215 | uint8_t access; |
| 216 | const uint8_t mask = TPM_ACCESS_VALID | TPM_ACCESS_ACTIVE_LOCALITY; |
Duncan Laurie | 510cb6a | 2016-09-19 17:05:45 -0700 | [diff] [blame] | 217 | |
Tim Wawrzynczak | eb1891a | 2022-02-08 12:49:31 -0700 | [diff] [blame] | 218 | if (cr50_i2c_read(TPM_ACCESS(0), &access, sizeof(access))) |
Duncan Laurie | 510cb6a | 2016-09-19 17:05:45 -0700 | [diff] [blame] | 219 | return -1; |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 220 | |
Duncan Laurie | 2bc6ad3 | 2017-11-07 09:13:19 -0800 | [diff] [blame] | 221 | if ((access & mask) == mask) { |
| 222 | printk(BIOS_INFO, "Locality already claimed\n"); |
| 223 | return 0; |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 224 | } |
Duncan Laurie | 2bc6ad3 | 2017-11-07 09:13:19 -0800 | [diff] [blame] | 225 | |
| 226 | access = TPM_ACCESS_REQUEST_USE; |
Tim Wawrzynczak | eb1891a | 2022-02-08 12:49:31 -0700 | [diff] [blame] | 227 | if (cr50_i2c_write(TPM_ACCESS(0), |
Duncan Laurie | 2bc6ad3 | 2017-11-07 09:13:19 -0800 | [diff] [blame] | 228 | &access, sizeof(access))) |
| 229 | return -1; |
| 230 | |
Tim Wawrzynczak | eb1891a | 2022-02-08 12:49:31 -0700 | [diff] [blame] | 231 | if (cr50_i2c_read(TPM_ACCESS(0), &access, sizeof(access))) |
Duncan Laurie | 2bc6ad3 | 2017-11-07 09:13:19 -0800 | [diff] [blame] | 232 | return -1; |
| 233 | |
| 234 | if ((access & mask) != mask) { |
| 235 | printk(BIOS_INFO, "Failed to claim locality.\n"); |
| 236 | return -1; |
| 237 | } |
| 238 | |
| 239 | return 0; |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 240 | } |
| 241 | |
| 242 | /* cr50 requires all 4 bytes of status register to be read */ |
Duncan Laurie | f235a9b | 2016-09-19 17:19:10 -0700 | [diff] [blame] | 243 | static uint8_t cr50_i2c_tis_status(struct tpm_chip *chip) |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 244 | { |
| 245 | uint8_t buf[4]; |
Tim Wawrzynczak | eb1891a | 2022-02-08 12:49:31 -0700 | [diff] [blame] | 246 | if (cr50_i2c_read(TPM_STS(chip->vendor.locality), |
Duncan Laurie | 510cb6a | 2016-09-19 17:05:45 -0700 | [diff] [blame] | 247 | buf, sizeof(buf)) < 0) { |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 248 | printk(BIOS_ERR, "%s: Failed to read status\n", __func__); |
| 249 | return 0; |
| 250 | } |
| 251 | return buf[0]; |
| 252 | } |
| 253 | |
| 254 | /* cr50 requires all 4 bytes of status register to be written */ |
Duncan Laurie | f235a9b | 2016-09-19 17:19:10 -0700 | [diff] [blame] | 255 | static void cr50_i2c_tis_ready(struct tpm_chip *chip) |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 256 | { |
| 257 | uint8_t buf[4] = { TPM_STS_COMMAND_READY }; |
Tim Wawrzynczak | eb1891a | 2022-02-08 12:49:31 -0700 | [diff] [blame] | 258 | cr50_i2c_write(TPM_STS(chip->vendor.locality), buf, sizeof(buf)); |
Duncan Laurie | 1dc036c | 2016-09-19 16:49:23 -0700 | [diff] [blame] | 259 | mdelay(CR50_TIMEOUT_SHORT_MS); |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 260 | } |
| 261 | |
| 262 | /* cr50 uses bytes 3:2 of status register for burst count and |
| 263 | * all 4 bytes must be read */ |
Duncan Laurie | f235a9b | 2016-09-19 17:19:10 -0700 | [diff] [blame] | 264 | static int cr50_i2c_wait_burststs(struct tpm_chip *chip, uint8_t mask, |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 265 | size_t *burst, int *status) |
| 266 | { |
| 267 | uint8_t buf[4]; |
| 268 | struct stopwatch sw; |
| 269 | |
Duncan Laurie | 1dc036c | 2016-09-19 16:49:23 -0700 | [diff] [blame] | 270 | stopwatch_init_msecs_expire(&sw, CR50_TIMEOUT_LONG_MS); |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 271 | |
| 272 | while (!stopwatch_expired(&sw)) { |
Tim Wawrzynczak | eb1891a | 2022-02-08 12:49:31 -0700 | [diff] [blame] | 273 | if (cr50_i2c_read(TPM_STS(chip->vendor.locality), |
Duncan Laurie | 510cb6a | 2016-09-19 17:05:45 -0700 | [diff] [blame] | 274 | buf, sizeof(buf)) != 0) { |
Duncan Laurie | 1dc036c | 2016-09-19 16:49:23 -0700 | [diff] [blame] | 275 | mdelay(CR50_TIMEOUT_SHORT_MS); |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 276 | continue; |
| 277 | } |
| 278 | |
| 279 | *status = buf[0]; |
| 280 | *burst = read_le16(&buf[1]); |
| 281 | |
| 282 | /* Check if mask matches and burst is valid */ |
| 283 | if ((*status & mask) == mask && |
Duncan Laurie | 3727a8d | 2016-09-19 16:37:46 -0700 | [diff] [blame] | 284 | *burst > 0 && *burst <= CR50_MAX_BUFSIZE) |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 285 | return 0; |
| 286 | |
Duncan Laurie | 1dc036c | 2016-09-19 16:49:23 -0700 | [diff] [blame] | 287 | mdelay(CR50_TIMEOUT_SHORT_MS); |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 288 | } |
| 289 | |
| 290 | printk(BIOS_ERR, "%s: Timeout reading burst and status\n", __func__); |
| 291 | return -1; |
| 292 | } |
| 293 | |
Duncan Laurie | f235a9b | 2016-09-19 17:19:10 -0700 | [diff] [blame] | 294 | static int cr50_i2c_tis_recv(struct tpm_chip *chip, uint8_t *buf, |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 295 | size_t buf_len) |
| 296 | { |
| 297 | size_t burstcnt, current, len, expected; |
| 298 | uint8_t addr = TPM_DATA_FIFO(chip->vendor.locality); |
Duncan Laurie | f235a9b | 2016-09-19 17:19:10 -0700 | [diff] [blame] | 299 | uint8_t mask = TPM_STS_VALID | TPM_STS_DATA_AVAIL; |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 300 | int status; |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 301 | |
| 302 | if (buf_len < TPM_HEADER_SIZE) |
Duncan Laurie | f235a9b | 2016-09-19 17:19:10 -0700 | [diff] [blame] | 303 | goto out_err; |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 304 | |
Duncan Laurie | f235a9b | 2016-09-19 17:19:10 -0700 | [diff] [blame] | 305 | if (cr50_i2c_wait_burststs(chip, mask, &burstcnt, &status) < 0) { |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 306 | printk(BIOS_ERR, "%s: First chunk not available\n", __func__); |
Duncan Laurie | f235a9b | 2016-09-19 17:19:10 -0700 | [diff] [blame] | 307 | goto out_err; |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 308 | } |
| 309 | |
| 310 | /* Read first chunk of burstcnt bytes */ |
Tim Wawrzynczak | eb1891a | 2022-02-08 12:49:31 -0700 | [diff] [blame] | 311 | if (cr50_i2c_read(addr, buf, burstcnt) != 0) { |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 312 | printk(BIOS_ERR, "%s: Read failed\n", __func__); |
Duncan Laurie | f235a9b | 2016-09-19 17:19:10 -0700 | [diff] [blame] | 313 | goto out_err; |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 314 | } |
| 315 | |
| 316 | /* Determine expected data in the return buffer */ |
| 317 | expected = read_be32(buf + TPM_RSP_SIZE_BYTE); |
| 318 | if (expected > buf_len) { |
| 319 | printk(BIOS_ERR, "%s: Too much data: %zu > %zu\n", |
| 320 | __func__, expected, buf_len); |
Duncan Laurie | f235a9b | 2016-09-19 17:19:10 -0700 | [diff] [blame] | 321 | goto out_err; |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 322 | } |
| 323 | |
| 324 | /* Now read the rest of the data */ |
| 325 | current = burstcnt; |
| 326 | while (current < expected) { |
| 327 | /* Read updated burst count and check status */ |
Duncan Laurie | f235a9b | 2016-09-19 17:19:10 -0700 | [diff] [blame] | 328 | if (cr50_i2c_wait_burststs(chip, mask, &burstcnt, &status) < 0) |
| 329 | goto out_err; |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 330 | |
Elyes HAOUAS | 361a935 | 2019-12-18 21:26:33 +0100 | [diff] [blame] | 331 | len = MIN(burstcnt, expected - current); |
Tim Wawrzynczak | eb1891a | 2022-02-08 12:49:31 -0700 | [diff] [blame] | 332 | if (cr50_i2c_read(addr, buf + current, len) != 0) { |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 333 | printk(BIOS_ERR, "%s: Read failed\n", __func__); |
Duncan Laurie | f235a9b | 2016-09-19 17:19:10 -0700 | [diff] [blame] | 334 | goto out_err; |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 335 | } |
| 336 | |
| 337 | current += len; |
| 338 | } |
| 339 | |
| 340 | /* Ensure TPM is done reading data */ |
Duncan Laurie | f235a9b | 2016-09-19 17:19:10 -0700 | [diff] [blame] | 341 | if (cr50_i2c_wait_burststs(chip, TPM_STS_VALID, &burstcnt, &status) < 0) |
| 342 | goto out_err; |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 343 | if (status & TPM_STS_DATA_AVAIL) { |
| 344 | printk(BIOS_ERR, "%s: Data still available\n", __func__); |
Duncan Laurie | f235a9b | 2016-09-19 17:19:10 -0700 | [diff] [blame] | 345 | goto out_err; |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 346 | } |
| 347 | |
Duncan Laurie | f235a9b | 2016-09-19 17:19:10 -0700 | [diff] [blame] | 348 | return current; |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 349 | |
Duncan Laurie | f235a9b | 2016-09-19 17:19:10 -0700 | [diff] [blame] | 350 | out_err: |
| 351 | /* Abort current transaction if still pending */ |
| 352 | if (cr50_i2c_tis_status(chip) & TPM_STS_COMMAND_READY) |
| 353 | cr50_i2c_tis_ready(chip); |
| 354 | return -1; |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 355 | } |
| 356 | |
Duncan Laurie | f235a9b | 2016-09-19 17:19:10 -0700 | [diff] [blame] | 357 | static int cr50_i2c_tis_send(struct tpm_chip *chip, uint8_t *buf, size_t len) |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 358 | { |
| 359 | int status; |
| 360 | size_t burstcnt, limit, sent = 0; |
| 361 | uint8_t tpm_go[4] = { TPM_STS_GO }; |
| 362 | struct stopwatch sw; |
| 363 | |
Duncan Laurie | 1dc036c | 2016-09-19 16:49:23 -0700 | [diff] [blame] | 364 | stopwatch_init_msecs_expire(&sw, CR50_TIMEOUT_LONG_MS); |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 365 | |
| 366 | /* Wait until TPM is ready for a command */ |
Duncan Laurie | f235a9b | 2016-09-19 17:19:10 -0700 | [diff] [blame] | 367 | while (!(cr50_i2c_tis_status(chip) & TPM_STS_COMMAND_READY)) { |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 368 | if (stopwatch_expired(&sw)) { |
| 369 | printk(BIOS_ERR, "%s: Command ready timeout\n", |
| 370 | __func__); |
| 371 | return -1; |
| 372 | } |
| 373 | |
Duncan Laurie | f235a9b | 2016-09-19 17:19:10 -0700 | [diff] [blame] | 374 | cr50_i2c_tis_ready(chip); |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 375 | } |
| 376 | |
| 377 | while (len > 0) { |
Duncan Laurie | f235a9b | 2016-09-19 17:19:10 -0700 | [diff] [blame] | 378 | uint8_t mask = TPM_STS_VALID; |
| 379 | |
| 380 | /* Wait for data if this is not the first chunk */ |
| 381 | if (sent > 0) |
| 382 | mask |= TPM_STS_DATA_EXPECT; |
| 383 | |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 384 | /* Read burst count and check status */ |
Duncan Laurie | f235a9b | 2016-09-19 17:19:10 -0700 | [diff] [blame] | 385 | if (cr50_i2c_wait_burststs(chip, mask, &burstcnt, &status) < 0) |
| 386 | goto out_err; |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 387 | |
| 388 | /* Use burstcnt - 1 to account for the address byte |
Duncan Laurie | 510cb6a | 2016-09-19 17:05:45 -0700 | [diff] [blame] | 389 | * that is inserted by cr50_i2c_write() */ |
Elyes HAOUAS | 361a935 | 2019-12-18 21:26:33 +0100 | [diff] [blame] | 390 | limit = MIN(burstcnt - 1, len); |
Tim Wawrzynczak | eb1891a | 2022-02-08 12:49:31 -0700 | [diff] [blame] | 391 | if (cr50_i2c_write(TPM_DATA_FIFO(chip->vendor.locality), |
Duncan Laurie | 510cb6a | 2016-09-19 17:05:45 -0700 | [diff] [blame] | 392 | &buf[sent], limit) != 0) { |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 393 | printk(BIOS_ERR, "%s: Write failed\n", __func__); |
Duncan Laurie | f235a9b | 2016-09-19 17:19:10 -0700 | [diff] [blame] | 394 | goto out_err; |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 395 | } |
| 396 | |
| 397 | sent += limit; |
| 398 | len -= limit; |
| 399 | } |
| 400 | |
| 401 | /* Ensure TPM is not expecting more data */ |
Duncan Laurie | f235a9b | 2016-09-19 17:19:10 -0700 | [diff] [blame] | 402 | if (cr50_i2c_wait_burststs(chip, TPM_STS_VALID, &burstcnt, &status) < 0) |
| 403 | goto out_err; |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 404 | if (status & TPM_STS_DATA_EXPECT) { |
| 405 | printk(BIOS_ERR, "%s: Data still expected\n", __func__); |
Duncan Laurie | f235a9b | 2016-09-19 17:19:10 -0700 | [diff] [blame] | 406 | goto out_err; |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 407 | } |
| 408 | |
| 409 | /* Start the TPM command */ |
Tim Wawrzynczak | eb1891a | 2022-02-08 12:49:31 -0700 | [diff] [blame] | 410 | if (cr50_i2c_write(TPM_STS(chip->vendor.locality), tpm_go, |
Duncan Laurie | 510cb6a | 2016-09-19 17:05:45 -0700 | [diff] [blame] | 411 | sizeof(tpm_go)) < 0) { |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 412 | printk(BIOS_ERR, "%s: Start command failed\n", __func__); |
Duncan Laurie | f235a9b | 2016-09-19 17:19:10 -0700 | [diff] [blame] | 413 | goto out_err; |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 414 | } |
| 415 | return sent; |
| 416 | |
Duncan Laurie | f235a9b | 2016-09-19 17:19:10 -0700 | [diff] [blame] | 417 | out_err: |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 418 | /* Abort current transaction if still pending */ |
Duncan Laurie | f235a9b | 2016-09-19 17:19:10 -0700 | [diff] [blame] | 419 | if (cr50_i2c_tis_status(chip) & TPM_STS_COMMAND_READY) |
| 420 | cr50_i2c_tis_ready(chip); |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 421 | return -1; |
| 422 | } |
| 423 | |
| 424 | static void cr50_vendor_init(struct tpm_chip *chip) |
| 425 | { |
| 426 | memset(&chip->vendor, 0, sizeof(struct tpm_vendor_specific)); |
| 427 | chip->vendor.req_complete_mask = TPM_STS_DATA_AVAIL | TPM_STS_VALID; |
| 428 | chip->vendor.req_complete_val = TPM_STS_DATA_AVAIL | TPM_STS_VALID; |
| 429 | chip->vendor.req_canceled = TPM_STS_COMMAND_READY; |
Duncan Laurie | f235a9b | 2016-09-19 17:19:10 -0700 | [diff] [blame] | 430 | chip->vendor.status = &cr50_i2c_tis_status; |
| 431 | chip->vendor.recv = &cr50_i2c_tis_recv; |
| 432 | chip->vendor.send = &cr50_i2c_tis_send; |
| 433 | chip->vendor.cancel = &cr50_i2c_tis_ready; |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 434 | } |
| 435 | |
Lee Leahy | 52ab30b | 2017-03-15 09:22:11 -0700 | [diff] [blame] | 436 | int tpm_vendor_probe(unsigned int bus, uint32_t addr) |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 437 | { |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 438 | return 0; |
| 439 | } |
| 440 | |
Keith Short | 5143635 | 2018-12-17 14:21:46 -0700 | [diff] [blame] | 441 | static int cr50_i2c_probe(struct tpm_chip *chip, uint32_t *did_vid) |
| 442 | { |
| 443 | int retries; |
| 444 | |
| 445 | /* |
Rob Barnes | 22372f4 | 2022-02-11 07:59:21 -0700 | [diff] [blame] | 446 | * 1s should be enough to synchronize with the TPM even under the |
Keith Short | 5143635 | 2018-12-17 14:21:46 -0700 | [diff] [blame] | 447 | * worst nested reset request conditions. In vast majority of cases |
Rob Barnes | 22372f4 | 2022-02-11 07:59:21 -0700 | [diff] [blame] | 448 | * there would be no wait at all. If this probe fails, boot likely |
| 449 | * cannot proceed, so an extra long timeout is appropriate. |
Keith Short | 5143635 | 2018-12-17 14:21:46 -0700 | [diff] [blame] | 450 | */ |
| 451 | printk(BIOS_INFO, "Probing TPM I2C: "); |
| 452 | |
Rob Barnes | 22372f4 | 2022-02-11 07:59:21 -0700 | [diff] [blame] | 453 | for (retries = 100; retries > 0; retries--) { |
Keith Short | 5143635 | 2018-12-17 14:21:46 -0700 | [diff] [blame] | 454 | int rc; |
| 455 | |
Tim Wawrzynczak | eb1891a | 2022-02-08 12:49:31 -0700 | [diff] [blame] | 456 | rc = cr50_i2c_read(TPM_DID_VID(0), (uint8_t *)did_vid, 4); |
Keith Short | 5143635 | 2018-12-17 14:21:46 -0700 | [diff] [blame] | 457 | |
| 458 | /* Exit once DID and VID verified */ |
Jes Klinke | 1430b04 | 2022-03-28 14:22:24 -0700 | [diff] [blame^] | 459 | if (!rc && (*did_vid == CR50_DID_VID || *did_vid == TI50_DID_VID)) { |
Keith Short | 5143635 | 2018-12-17 14:21:46 -0700 | [diff] [blame] | 460 | printk(BIOS_INFO, "done! DID_VID 0x%08x\n", *did_vid); |
| 461 | return 0; |
| 462 | } |
| 463 | |
| 464 | /* TPM might be resetting, let's retry in a bit. */ |
| 465 | mdelay(10); |
| 466 | printk(BIOS_INFO, "."); |
| 467 | } |
| 468 | |
| 469 | /* |
| 470 | * I2C reads failed, or the DID and VID didn't match |
| 471 | */ |
| 472 | printk(BIOS_ERR, "DID_VID 0x%08x not recognized\n", *did_vid); |
| 473 | return -1; |
| 474 | } |
| 475 | |
Lee Leahy | 52ab30b | 2017-03-15 09:22:11 -0700 | [diff] [blame] | 476 | int tpm_vendor_init(struct tpm_chip *chip, unsigned int bus, uint32_t dev_addr) |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 477 | { |
Keith Short | 5143635 | 2018-12-17 14:21:46 -0700 | [diff] [blame] | 478 | uint32_t did_vid = 0; |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 479 | |
| 480 | if (dev_addr == 0) { |
| 481 | printk(BIOS_ERR, "%s: missing device address\n", __func__); |
| 482 | return -1; |
| 483 | } |
| 484 | |
Patrick Georgi | c9b1359 | 2019-11-29 11:47:47 +0100 | [diff] [blame] | 485 | tpm_dev.bus = bus; |
| 486 | tpm_dev.addr = dev_addr; |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 487 | |
| 488 | cr50_vendor_init(chip); |
| 489 | |
Keith Short | 5143635 | 2018-12-17 14:21:46 -0700 | [diff] [blame] | 490 | if (cr50_i2c_probe(chip, &did_vid)) |
| 491 | return -1; |
| 492 | |
Julius Werner | 21a4053 | 2020-04-21 16:03:53 -0700 | [diff] [blame] | 493 | if (ENV_SEPARATE_VERSTAGE || ENV_BOOTBLOCK) |
Tim Wawrzynczak | eb1891a | 2022-02-08 12:49:31 -0700 | [diff] [blame] | 494 | if (process_reset()) |
Duncan Laurie | 2bc6ad3 | 2017-11-07 09:13:19 -0800 | [diff] [blame] | 495 | return -1; |
| 496 | |
Tim Wawrzynczak | eb1891a | 2022-02-08 12:49:31 -0700 | [diff] [blame] | 497 | if (claim_locality()) |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 498 | return -1; |
| 499 | |
Daniel Kurtz | c4852e7 | 2017-04-21 14:11:51 +0800 | [diff] [blame] | 500 | printk(BIOS_DEBUG, "cr50 TPM 2.0 (i2c %u:0x%02x id 0x%x)\n", |
Keith Short | 5143635 | 2018-12-17 14:21:46 -0700 | [diff] [blame] | 501 | bus, dev_addr, did_vid >> 16); |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 502 | |
Jes Klinke | 1430b04 | 2022-03-28 14:22:24 -0700 | [diff] [blame^] | 503 | if (tpm_first_access_this_boot()) { |
Tim Wawrzynczak | 1e50dfb | 2022-02-16 13:48:07 -0700 | [diff] [blame] | 504 | /* This is called for the side-effect of printing the version string. */ |
Jes Klinke | 1430b04 | 2022-03-28 14:22:24 -0700 | [diff] [blame^] | 505 | cr50_get_firmware_version(NULL); |
| 506 | cr50_set_board_cfg(); |
Tim Wawrzynczak | 1e50dfb | 2022-02-16 13:48:07 -0700 | [diff] [blame] | 507 | } |
| 508 | |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 509 | chip->is_open = 1; |
| 510 | return 0; |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 511 | } |
| 512 | |
| 513 | void tpm_vendor_cleanup(struct tpm_chip *chip) |
| 514 | { |
Duncan Laurie | 2ea13c8 | 2016-09-19 16:04:39 -0700 | [diff] [blame] | 515 | } |
Tim Wawrzynczak | 1e50dfb | 2022-02-16 13:48:07 -0700 | [diff] [blame] | 516 | |
Subrata Banik | 60b2ab8 | 2022-03-09 12:55:34 +0530 | [diff] [blame] | 517 | enum cb_err tis_vendor_write(unsigned int addr, const void *buffer, size_t bytes) |
Tim Wawrzynczak | 1e50dfb | 2022-02-16 13:48:07 -0700 | [diff] [blame] | 518 | { |
| 519 | return cr50_i2c_write(addr & 0xff, buffer, bytes) ? CB_ERR : CB_SUCCESS; |
| 520 | } |
| 521 | |
Subrata Banik | 60b2ab8 | 2022-03-09 12:55:34 +0530 | [diff] [blame] | 522 | enum cb_err tis_vendor_read(unsigned int addr, void *buffer, size_t bytes) |
Tim Wawrzynczak | 1e50dfb | 2022-02-16 13:48:07 -0700 | [diff] [blame] | 523 | { |
| 524 | return cr50_i2c_read(addr & 0xff, buffer, bytes) ? CB_ERR : CB_SUCCESS; |
| 525 | } |