blob: 60d69f678f76410d933c6ca97cc481772bc12746 [file] [log] [blame]
jinkun.hongac490b82014-06-22 20:40:39 -07001##
2## This file is part of the coreboot project.
3##
4## Copyright 2014 Rockchip Inc.
5##
6## This program is free software; you can redistribute it and/or modify
7## it under the terms of the GNU General Public License as published by
8## the Free Software Foundation; version 2 of the License.
9##
10## This program is distributed in the hope that it will be useful,
11## but WITHOUT ANY WARRANTY; without even the implied warranty of
12## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13## GNU General Public License for more details.
14##
15## You should have received a copy of the GNU General Public License
16## along with this program; if not, write to the Free Software
17## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
18##
19
20config SOC_ROCKCHIP_RK3288
21 bool
22 default n
23 select ARCH_BOOTBLOCK_ARMV7
24 select ARCH_VERSTAGE_ARMV7
25 select ARCH_ROMSTAGE_ARMV7
26 select ARCH_RAMSTAGE_ARMV7
27 select CPU_HAS_BOOTBLOCK_INIT
28 select HAVE_MONOTONIC_TIMER
Aaron Durbine5e36302014-09-25 10:05:15 -050029 select GENERIC_UDELAY
jinkun.hongac490b82014-06-22 20:40:39 -070030 select HAVE_UART_MEMORY_MAPPED
31 select HAVE_UART_SPECIAL
32 select BOOTBLOCK_CONSOLE
Julius Wernercdf92ea2014-12-09 12:18:00 -080033 select UNCOMPRESSED_RAMSTAGE
Kyösti Mälkki51794192015-03-17 07:11:26 +020034
jinkun.hongac490b82014-06-22 20:40:39 -070035if SOC_ROCKCHIP_RK3288
36
37config BOOTBLOCK_CPU_INIT
38 string
39 default "soc/rockchip/rk3288/bootblock.c"
40
David Hendricks4d244212015-01-12 13:13:30 -080041config PMIC_BUS
42 int
43 default -1
44
jinkun.hongac490b82014-06-22 20:40:39 -070045endif