Kyösti Mälkki | e8b4da2 | 2014-10-21 18:22:32 +0300 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
| 4 | * Copyright (C) 2014 Sage Electronic Engineering, LLC. |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; version 2 of the License. |
| 9 | * |
| 10 | * This program is distributed in the hope that it will be useful, |
| 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | * GNU General Public License for more details. |
Kyösti Mälkki | e8b4da2 | 2014-10-21 18:22:32 +0300 | [diff] [blame] | 14 | */ |
| 15 | |
| 16 | #ifndef _PI_HUDSON_PCI_DEVS_H_ |
| 17 | #define _PI_HUDSON_PCI_DEVS_H_ |
| 18 | |
Marshall Dawson | c1f3233 | 2017-04-21 13:54:08 -0600 | [diff] [blame] | 19 | #define BUS0 0 |
Kyösti Mälkki | e8b4da2 | 2014-10-21 18:22:32 +0300 | [diff] [blame] | 20 | |
| 21 | /* XHCI */ |
Marshall Dawson | c1f3233 | 2017-04-21 13:54:08 -0600 | [diff] [blame] | 22 | #define XHCI_DEV 0x10 |
| 23 | #define XHCI_FUNC 0 |
| 24 | #define XHCI_DEVID 0x7814 |
| 25 | #define XHCI_DEVFN PCI_DEVFN(XHCI_DEV,XHCI_FUNC) |
Kyösti Mälkki | e8b4da2 | 2014-10-21 18:22:32 +0300 | [diff] [blame] | 26 | |
Marshall Dawson | c1f3233 | 2017-04-21 13:54:08 -0600 | [diff] [blame] | 27 | #define XHCI2_DEV 0x10 |
| 28 | #define XHCI2_FUNC 1 |
| 29 | #define XHCI2_DEVID 0x7814 |
| 30 | #define XHCI2_DEVFN PCI_DEVFN(XHCI2_DEV,XHCI2_FUNC) |
Dave Frodin | 9cfa742 | 2015-01-27 07:19:48 -0700 | [diff] [blame] | 31 | |
Kyösti Mälkki | e8b4da2 | 2014-10-21 18:22:32 +0300 | [diff] [blame] | 32 | /* SATA */ |
Marshall Dawson | c1f3233 | 2017-04-21 13:54:08 -0600 | [diff] [blame] | 33 | #define SATA_DEV 0x11 |
| 34 | #define SATA_FUNC 0 |
| 35 | #define SATA_IDE_DEVID 0x7800 |
| 36 | #define AHCI_DEVID_MS 0x7801 |
| 37 | #define AHCI_DEVID_AMD 0x7804 |
| 38 | #define SATA_DEVFN PCI_DEVFN(SATA_DEV,SATA_FUNC) |
Kyösti Mälkki | e8b4da2 | 2014-10-21 18:22:32 +0300 | [diff] [blame] | 39 | |
| 40 | /* OHCI */ |
Marshall Dawson | c1f3233 | 2017-04-21 13:54:08 -0600 | [diff] [blame] | 41 | #define OHCI1_DEV 0x12 |
| 42 | #define OHCI1_FUNC 0 |
| 43 | #define OHCI2_DEV 0x13 |
| 44 | #define OHCI2_FUNC 0 |
| 45 | #define OHCI3_DEV 0x16 |
| 46 | #define OHCI3_FUNC 0 |
| 47 | #define OHCI4_DEV 0x14 |
| 48 | #define OHCI4_FUNC 5 |
| 49 | #define OHCI_DEVID 0x7807 |
| 50 | #define OHCI1_DEVFN PCI_DEVFN(OHCI1_DEV,OHCI1_FUNC) |
| 51 | #define OHCI2_DEVFN PCI_DEVFN(OHCI2_DEV,OHCI2_FUNC) |
| 52 | #define OHCI3_DEVFN PCI_DEVFN(OHCI3_DEV,OHCI3_FUNC) |
| 53 | #define OHCI4_DEVFN PCI_DEVFN(OHCI4_DEV,OHCI4_FUNC) |
Kyösti Mälkki | e8b4da2 | 2014-10-21 18:22:32 +0300 | [diff] [blame] | 54 | |
| 55 | /* EHCI */ |
Marshall Dawson | c1f3233 | 2017-04-21 13:54:08 -0600 | [diff] [blame] | 56 | #define EHCI1_DEV 0x12 |
| 57 | #define EHCI1_FUNC 2 |
| 58 | #define EHCI2_DEV 0x13 |
| 59 | #define EHCI2_FUNC 2 |
| 60 | #define EHCI3_DEV 0x16 |
| 61 | #define EHCI3_FUNC 2 |
| 62 | #define EHCI_DEVID 0x7808 |
| 63 | #define EHCI1_DEVFN PCI_DEVFN(EHCI1_DEV,EHCI1_FUNC) |
| 64 | #define EHCI2_DEVFN PCI_DEVFN(EHCI2_DEV,EHCI2_FUNC) |
| 65 | #define EHCI3_DEVFN PCI_DEVFN(EHCI3_DEV,EHCI3_FUNC) |
Kyösti Mälkki | e8b4da2 | 2014-10-21 18:22:32 +0300 | [diff] [blame] | 66 | |
| 67 | /* SMBUS */ |
Marshall Dawson | c1f3233 | 2017-04-21 13:54:08 -0600 | [diff] [blame] | 68 | #define SMBUS_DEV 0x14 |
| 69 | #define SMBUS_FUNC 0 |
| 70 | #define SMBUS_DEVID 0x780B |
| 71 | #define SMBUS_DEVFN PCI_DEVFN(SMBUS_DEV,SMBUS_FUNC) |
Kyösti Mälkki | e8b4da2 | 2014-10-21 18:22:32 +0300 | [diff] [blame] | 72 | |
Dave Frodin | 9cfa742 | 2015-01-27 07:19:48 -0700 | [diff] [blame] | 73 | /* IDE */ |
Julius Werner | cd49cce | 2019-03-05 16:53:33 -0800 | [diff] [blame^] | 74 | #if CONFIG(SOUTHBRIDGE_AMD_PI_BOLTON) |
Marshall Dawson | c1f3233 | 2017-04-21 13:54:08 -0600 | [diff] [blame] | 75 | #define IDE_DEV 0x14 |
| 76 | #define IDE_FUNC 1 |
| 77 | #define IDE_DEVID 0x780C |
| 78 | #define IDE_DEVFN PCI_DEVFN(IDE_DEV,IDE_FUNC) |
Dave Frodin | 9cfa742 | 2015-01-27 07:19:48 -0700 | [diff] [blame] | 79 | #endif |
| 80 | |
Kyösti Mälkki | e8b4da2 | 2014-10-21 18:22:32 +0300 | [diff] [blame] | 81 | /* HD Audio */ |
Marshall Dawson | c1f3233 | 2017-04-21 13:54:08 -0600 | [diff] [blame] | 82 | #define HDA_DEV 0x14 |
| 83 | #define HDA_FUNC 2 |
| 84 | #define HDA_DEVID 0x780D |
| 85 | #define HDA_DEVFN PCI_DEVFN(HDA_DEV,HDA_FUNC) |
Kyösti Mälkki | e8b4da2 | 2014-10-21 18:22:32 +0300 | [diff] [blame] | 86 | |
| 87 | /* LPC BUS */ |
Marshall Dawson | c1f3233 | 2017-04-21 13:54:08 -0600 | [diff] [blame] | 88 | #define PCU_DEV 0x14 |
Philipp Deppenwiese | 3067012 | 2017-03-01 02:24:33 +0100 | [diff] [blame] | 89 | #define LPC_DEV PCU_DEV |
Marshall Dawson | c1f3233 | 2017-04-21 13:54:08 -0600 | [diff] [blame] | 90 | #define LPC_FUNC 3 |
| 91 | #define LPC_DEVID 0x780E |
| 92 | #define LPC_DEVFN PCI_DEVFN(LPC_DEV,LPC_FUNC) |
Kyösti Mälkki | e8b4da2 | 2014-10-21 18:22:32 +0300 | [diff] [blame] | 93 | |
| 94 | /* PCI Ports */ |
Marshall Dawson | c1f3233 | 2017-04-21 13:54:08 -0600 | [diff] [blame] | 95 | #define SB_PCI_PORT_DEV 0x14 |
| 96 | #define SB_PCI_PORT_FUNC 4 |
| 97 | #define SB_PCI_PORT_DEVID 0x780F |
| 98 | #define SB_PCI_PORT_DEVFN PCI_DEVFN(SB_PCI_PORT_DEV,SB_PCI_PORT_FUNC) |
Kyösti Mälkki | e8b4da2 | 2014-10-21 18:22:32 +0300 | [diff] [blame] | 99 | |
| 100 | /* SD Controller */ |
Marshall Dawson | c1f3233 | 2017-04-21 13:54:08 -0600 | [diff] [blame] | 101 | #define SD_DEV 0x14 |
| 102 | #define SD_FUNC 7 |
| 103 | #define SD_DEVID 0x7806 |
| 104 | #define SD_DEVFN PCI_DEVFN(SD_DEV,SD_FUNC) |
Kyösti Mälkki | e8b4da2 | 2014-10-21 18:22:32 +0300 | [diff] [blame] | 105 | |
Dave Frodin | 9cfa742 | 2015-01-27 07:19:48 -0700 | [diff] [blame] | 106 | /* PCIe Ports */ |
Julius Werner | cd49cce | 2019-03-05 16:53:33 -0800 | [diff] [blame^] | 107 | #if CONFIG(SOUTHBRIDGE_AMD_PI_BOLTON) |
Marshall Dawson | c1f3233 | 2017-04-21 13:54:08 -0600 | [diff] [blame] | 108 | #define SB_PCIE_DEV 0x15 |
| 109 | #define SB_PCIE_PORT1_FUNC 0 |
| 110 | #define SB_PCIE_PORT2_FUNC 1 |
| 111 | #define SB_PCIE_PORT3_FUNC 2 |
| 112 | #define SB_PCIE_PORT4_FUNC 3 |
| 113 | #define SB_PCIE_PORT1_DEVID 0x7820 |
| 114 | #define SB_PCIE_PORT2_DEVID 0x7821 |
| 115 | #define SB_PCIE_PORT3_DEVID 0x7822 |
| 116 | #define SB_PCIE_PORT4_DEVID 0x7823 |
| 117 | #define SB_PCIE_PORT1_DEVFN PCI_DEVFN(SB_PCIE_DEV,SB_PCIE_PORT1_FUNC) |
| 118 | #define SB_PCIE_PORT2_DEVFN PCI_DEVFN(SB_PCIE_DEV,SB_PCIE_PORT2_FUNC) |
| 119 | #define SB_PCIE_PORT3_DEVFN PCI_DEVFN(SB_PCIE_DEV,SB_PCIE_PORT3_FUNC) |
| 120 | #define SB_PCIE_PORT4_DEVFN PCI_DEVFN(SB_PCIE_DEV,SB_PCIE_PORT4_FUNC) |
Dave Frodin | 9cfa742 | 2015-01-27 07:19:48 -0700 | [diff] [blame] | 121 | #endif |
| 122 | |
Kyösti Mälkki | e8b4da2 | 2014-10-21 18:22:32 +0300 | [diff] [blame] | 123 | #endif /* _PI_HUDSON_PCI_DEVS_H_ */ |