southbridge/amd/pi: Add the bolton definitions
This adds the PCI and interrupt related definitions
for the bolton specific features.
Change-Id: Ia6530c57ec5a4a5c4525bfbae0eb5db04c0bef9e
Signed-off-by: Dave Frodin <dave.frodin@se-eng.com>
Reviewed-on: http://review.coreboot.org/8286
Tested-by: build bot (Jenkins)
Reviewed-by: Marc Jones <marc.jones@se-eng.com>
diff --git a/src/southbridge/amd/pi/hudson/pci_devs.h b/src/southbridge/amd/pi/hudson/pci_devs.h
index d2549d4..c22f758 100644
--- a/src/southbridge/amd/pi/hudson/pci_devs.h
+++ b/src/southbridge/amd/pi/hudson/pci_devs.h
@@ -28,6 +28,11 @@
#define XHCI_DEVID 0x7814
#define XHCI_DEVFN PCI_DEVFN(XHCI_DEV,XHCI_FUNC)
+#define XHCI2_DEV 0x10
+#define XHCI2_FUNC 1
+#define XHCI2_DEVID 0x7814
+#define XHCI2_DEVFN PCI_DEVFN(XHCI2_DEV,XHCI2_FUNC)
+
/* SATA */
#define SATA_DEV 0x11
#define SATA_FUNC 0
@@ -69,6 +74,14 @@
#define SMBUS_DEVID 0x780B
#define SMBUS_DEVFN PCI_DEVFN(SMBUS_DEV,SMBUS_FUNC)
+/* IDE */
+#if IS_ENABLED(CONFIG_SOUTHBRIDGE_AMD_PI_BOLTON)
+#define IDE_DEV 0x14
+#define IDE_FUNC 1
+# define IDE_DEVID 0x780C
+# define IDE_DEVFN PCI_DEVFN(IDE_DEV,IDE_FUNC)
+#endif
+
/* HD Audio */
#define HDA_DEV 0x14
#define HDA_FUNC 2
@@ -93,4 +106,21 @@
#define SD_DEVID 0x7806
#define SD_DEVFN PCI_DEVFN(SD_DEV,SD_FUNC)
+/* PCIe Ports */
+#if IS_ENABLED(CONFIG_SOUTHBRIDGE_AMD_PI_BOLTON)
+#define SB_PCIE_DEV 0x15
+#define SB_PCIE_PORT1_FUNC 0
+#define SB_PCIE_PORT2_FUNC 1
+#define SB_PCIE_PORT3_FUNC 2
+#define SB_PCIE_PORT4_FUNC 3
+#define SB_PCIE_PORT1_DEVID 0x7820
+#define SB_PCIE_PORT2_DEVID 0x7821
+#define SB_PCIE_PORT3_DEVID 0x7822
+#define SB_PCIE_PORT4_DEVID 0x7823
+#define SB_PCIE_PORT1_DEVFN PCI_DEVFN(SB_PCIE_DEV,SB_PCIE_PORT1_FUNC)
+#define SB_PCIE_PORT2_DEVFN PCI_DEVFN(SB_PCIE_DEV,SB_PCIE_PORT2_FUNC)
+#define SB_PCIE_PORT3_DEVFN PCI_DEVFN(SB_PCIE_DEV,SB_PCIE_PORT3_FUNC)
+#define SB_PCIE_PORT4_DEVFN PCI_DEVFN(SB_PCIE_DEV,SB_PCIE_PORT4_FUNC)
+#endif
+
#endif /* _PI_HUDSON_PCI_DEVS_H_ */