blob: ed48757433a476102891b30be98d54c20bca5c0b [file] [log] [blame]
Ben-StarLabsb2db3652022-07-12 12:43:27 +01001chip soc/intel/alderlake
2 # Graphics
3 # TODO:
4 # register "panel_cfg" = "{
5 # .up_delay_ms = 200, // T3
6 # .backlight_on_delay_ms = 0, // T7
7 # .backlight_off_delay_ms = 50, // T9
8 # .down_delay_ms = 0, // T10
9 # .cycle_delay_ms = 500, // T12
10 # .backlight_pwm_hz = 200, // PWM
11 # }"
12
13 # FSP Memory
14 register "enable_c6dram" = "1"
15 register "sagv" = "SaGv_Enabled"
16
17 # FSP Silicon
18 register "eist_enable" = "1"
19
Sean Rhodesbcb93212023-08-08 14:42:52 +010020 register "cnvi_bt_core" = "1"
21 register "cnvi_bt_audio_offload" = "1"
22
Ben-StarLabsb2db3652022-07-12 12:43:27 +010023 # Serial I/O
24 register "serial_io_i2c_mode" = "{
25 [PchSerialIoIndexI2C0] = PchSerialIoPci,
26 }"
27
28 register "serial_io_uart_mode" = "{
29 [PchSerialIoIndexUART0] = PchSerialIoSkipInit,
30 }"
31
32 # Power
33 register "pch_slp_s3_min_assertion_width" = "2" # 50ms
34 register "pch_slp_s4_min_assertion_width" = "3" # 1s
35 register "pch_slp_sus_min_assertion_width" = "3" # 500ms
36 register "pch_slp_a_min_assertion_width" = "3" # 2s
37
38 # PM Util
39 register "pmc_gpe0_dw0" = "GPP_B"
40 register "pmc_gpe0_dw1" = "GPP_C"
41 register "pmc_gpe0_dw2" = "GPP_E"
42
43 # Device Tree
Arthur Heymans69cd7292022-11-07 13:52:11 +010044 device cpu_cluster 0 on end
Ben-StarLabsb2db3652022-07-12 12:43:27 +010045
46 device domain 0 on
47 device ref igpu on
48 register "ddi_portA_config" = "1"
49 register "ddi_ports_config" = "{
50 [DDI_PORT_A] = DDI_ENABLE_HPD,
51 [DDI_PORT_B] = DDI_ENABLE_HPD | DDI_ENABLE_DDC,
52 }"
53 end
54 device ref gna on end
Ben-StarLabsb2db3652022-07-12 12:43:27 +010055 device ref xhci on
56 # Motherboard USB Type C
Sean Rhodes4d3a0262023-03-27 11:33:32 +010057 register "usb2_ports[0]" = "USB2_PORT_MID(OC5)"
Ben-StarLabsb2db3652022-07-12 12:43:27 +010058 register "usb3_ports[2]" = "USB3_PORT_DEFAULT(OC3)"
59
60 # Motherboard USB 3.0
Sean Rhodes4d3a0262023-03-27 11:33:32 +010061 register "usb2_ports[2]" = "USB2_PORT_MID(OC_SKIP)"
62 register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC5)"
Ben-StarLabsb2db3652022-07-12 12:43:27 +010063
64 # Daughterboard USB 3.0
Sean Rhodes4d3a0262023-03-27 11:33:32 +010065 register "usb2_ports[6]" = "USB2_PORT_MID(OC0)"
Ben-StarLabsb2db3652022-07-12 12:43:27 +010066 register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC_SKIP)"
67
68 # Internal Webcam
69 register "usb2_ports[CONFIG_CCD_PORT]" = "USB2_PORT_MID(OC_SKIP)"
70
71 # Fingerprint Reader
Sean Rhodes4d3a0262023-03-27 11:33:32 +010072 register "usb2_ports[5]" = "USB2_PORT_MID(OC0)"
Ben-StarLabsb2db3652022-07-12 12:43:27 +010073
74 # Daughterboard SD Card
75 register "usb2_ports[3]" = "USB2_PORT_MID(OC_SKIP)"
76
77 # Internal Bluetooth
78 register "usb2_ports[9]" = "USB2_PORT_MID(OC_SKIP)"
79 end
80 device ref i2c0 on
81 chip drivers/i2c/hid
82 register "generic.hid" = ""STAR0001""
83 register "generic.desc" = ""Touchpad""
84 register "generic.irq" = "ACPI_IRQ_LEVEL_LOW(GPP_E12_IRQ)"
85 register "hid_desc_reg_offset" = "0x20"
86 device i2c 2c on end
87 end
88 end
89 device ref shared_sram on end
Sean Rhodescc3b2db2023-08-30 11:15:06 +010090 device ref cnvi_wifi on
91 chip drivers/wifi/generic
92 register "wake" = "GPE0_PME_B0"
93 device generic 0 on end
94 end
95 end
96 device ref heci1 on end
Ben-StarLabsb2db3652022-07-12 12:43:27 +010097 device ref sata on
98 register "sata_salp_support" = "1"
99 register "sata_ports_enable[1]" = "1"
100 register "sata_ports_dev_slp[1]" = "1"
101 end
102 device ref pcie_rp5 on # WiFi
103 chip drivers/wifi/generic
104 register "wake" = "GPE0_PME_B0"
105 device generic 0 on end
106 end
107 register "pch_pcie_rp[PCH_RP(5)]" = "{
108 .clk_src = 2,
109 .clk_req = 2,
110 .flags = PCIE_RP_LTR | PCIE_RP_AER,
111 }"
112 smbios_slot_desc "SlotTypePciExpressGen3X1"
113 "SlotLengthShort"
114 "M.2/M 2230"
115 "SlotDataBusWidth1X"
116 chip soc/intel/common/block/pcie/rtd3
117 register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D13)"
118 register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_H2)"
119 register "srcclk_pin" = "2"
120 device generic 0 on end
121 end
122 end
123 device ref pcie_rp9 on # SSD x4
124 register "pch_pcie_rp[PCH_RP(9)]" = "{
125 .clk_src = 1,
126 .clk_req = 1,
127 .flags = PCIE_RP_LTR | PCIE_RP_AER,
Sean Rhodesfe2f50f2023-02-02 15:53:03 +0000128
Ben-StarLabsb2db3652022-07-12 12:43:27 +0100129 }"
130 smbios_slot_desc "SlotTypeM2Socket3"
131 "SlotLengthLong"
132 "M.2/M 2280"
133 "SlotDataBusWidth4X"
134 chip soc/intel/common/block/pcie/rtd3
135 register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D16)"
136 register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_H0)"
137 register "srcclk_pin" = "1"
138 device generic 0 on end
139 end
140 end
141 device ref uart0 on end
142 device ref pch_espi on
143 register "gen1_dec" = "0x00fc0201"
144 register "gen2_dec" = "0x00000381"
145 register "gen3_dec" = "0x00000511"
146
147 chip drivers/pc80/tpm
148 device pnp 0c31.0 on end
149 end
150
151 chip ec/starlabs/merlin
152 # Port pair 4Eh/4Fh
153 device pnp 4e.00 on end # IO Interface
154 device pnp 4e.01 off end # Com 1
155 device pnp 4e.02 off end # Com 2
156 device pnp 4e.04 off end # System Wake-Up
157 device pnp 4e.05 off end # PS/2 Mouse
158 device pnp 4e.06 on # PS/2 Keyboard
159 io 0x60 = 0x0060
160 io 0x62 = 0x0064
161 irq 0x70 = 1
162 end
163 device pnp 4e.0a off end # Consumer IR
164 device pnp 4e.0f off end # Shared Memory/Flash Interface
165 device pnp 4e.10 off end # RTC-like Timer
166 device pnp 4e.11 off end # Power Management Channel 1
167 device pnp 4e.12 off end # Power Management Channel 2
168 device pnp 4e.13 off end # Serial Peripheral Interface
169 device pnp 4e.14 off end # Platform EC Interface
170 device pnp 4e.17 off end # Power Management Channel 3
171 device pnp 4e.18 off end # Power Management Channel 4
172 device pnp 4e.19 off end # Power Management Channel 5
173 end
174 end
Ben-StarLabsb2db3652022-07-12 12:43:27 +0100175 device ref hda on
Sean Rhodes7c5625b2023-01-16 12:59:47 +0000176 register "pch_hda_audio_link_hda_enable" = "1"
177 register "pch_hda_idisp_codec_enable" = "1"
178 register "pch_hda_idisp_link_frequency" = "HDA_LINKFREQ_96MHZ"
179 register "pch_hda_idisp_link_tmode" = "HDA_TMODE_8T"
Ben-StarLabsb2db3652022-07-12 12:43:27 +0100180 end
181 device ref smbus on end
182 end
183end