Angel Pons | f94ac9a | 2020-04-05 15:46:48 +0200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
Duncan Laurie | c88c54c | 2014-04-30 16:36:13 -0700 | [diff] [blame] | 2 | |
| 3 | #include <console/console.h> |
| 4 | #include <device/device.h> |
Jonathan A. Kollasch | ec505ad2 | 2015-07-07 12:57:46 -0500 | [diff] [blame] | 5 | #include <device/azalia_device.h> |
Duncan Laurie | c88c54c | 2014-04-30 16:36:13 -0700 | [diff] [blame] | 6 | #include <device/pci.h> |
| 7 | #include <device/pci_ids.h> |
| 8 | #include <device/pci_ops.h> |
Kyösti Mälkki | 13f6650 | 2019-03-03 08:01:05 +0200 | [diff] [blame] | 9 | #include <device/mmio.h> |
Duncan Laurie | c88c54c | 2014-04-30 16:36:13 -0700 | [diff] [blame] | 10 | #include <soc/intel/common/hda_verb.h> |
Julius Werner | 4ee4bd5 | 2014-10-20 13:46:39 -0700 | [diff] [blame] | 11 | #include <soc/pch.h> |
| 12 | #include <soc/ramstage.h> |
| 13 | #include <soc/rcba.h> |
Duncan Laurie | c88c54c | 2014-04-30 16:36:13 -0700 | [diff] [blame] | 14 | |
Kevin Paul Herbert | bde6d30 | 2014-12-24 18:43:20 -0800 | [diff] [blame] | 15 | static void codecs_init(u8 *base, u32 codec_mask) |
Duncan Laurie | c88c54c | 2014-04-30 16:36:13 -0700 | [diff] [blame] | 16 | { |
| 17 | int i; |
| 18 | |
| 19 | /* Can support up to 4 codecs */ |
| 20 | for (i = 3; i >= 0; i--) { |
| 21 | if (codec_mask & (1 << i)) |
| 22 | hda_codec_init(base, i, |
| 23 | cim_verb_data_size, |
| 24 | cim_verb_data); |
| 25 | } |
| 26 | |
Jonathan A. Kollasch | ec505ad2 | 2015-07-07 12:57:46 -0500 | [diff] [blame] | 27 | if (pc_beep_verbs_size) |
Duncan Laurie | c88c54c | 2014-04-30 16:36:13 -0700 | [diff] [blame] | 28 | hda_codec_write(base, pc_beep_verbs_size, pc_beep_verbs); |
| 29 | } |
| 30 | |
Kevin Paul Herbert | bde6d30 | 2014-12-24 18:43:20 -0800 | [diff] [blame] | 31 | static void hda_pch_init(struct device *dev, u8 *base) |
Duncan Laurie | c88c54c | 2014-04-30 16:36:13 -0700 | [diff] [blame] | 32 | { |
| 33 | u8 reg8; |
| 34 | u16 reg16; |
| 35 | u32 reg32; |
| 36 | |
| 37 | if (RCBA32(0x2030) & (1 << 31)) { |
| 38 | reg32 = pci_read_config32(dev, 0x120); |
| 39 | reg32 &= 0xf8ffff01; |
| 40 | reg32 |= (1 << 25); |
| 41 | reg32 |= RCBA32(0x2030) & 0xfe; |
| 42 | pci_write_config32(dev, 0x120, reg32); |
| 43 | } else |
| 44 | printk(BIOS_DEBUG, "HDA: V1CTL disabled.\n"); |
| 45 | |
| 46 | reg32 = pci_read_config32(dev, 0x114); |
| 47 | reg32 &= ~0xfe; |
| 48 | pci_write_config32(dev, 0x114, reg32); |
| 49 | |
| 50 | // Set VCi enable bit |
| 51 | if (pci_read_config32(dev, 0x120) & ((1 << 24) | |
| 52 | (1 << 25) | (1 << 26))) { |
| 53 | reg32 = pci_read_config32(dev, 0x120); |
| 54 | reg32 &= ~(1 << 31); |
| 55 | pci_write_config32(dev, 0x120, reg32); |
| 56 | } |
| 57 | |
Duncan Laurie | c88c54c | 2014-04-30 16:36:13 -0700 | [diff] [blame] | 58 | /* Additional programming steps */ |
| 59 | reg32 = pci_read_config32(dev, 0xc4); |
| 60 | reg32 |= (1 << 24); |
| 61 | pci_write_config32(dev, 0xc4, reg32); |
| 62 | |
| 63 | reg8 = pci_read_config8(dev, 0x40); // Audio Control |
| 64 | reg8 |= 1; // Select HDA mode |
| 65 | pci_write_config8(dev, 0x40, reg8); |
| 66 | |
| 67 | reg8 = pci_read_config8(dev, 0x4d); // Docking Status |
| 68 | reg8 &= ~(1 << 7); // Docking not supported |
| 69 | pci_write_config8(dev, 0x4d, reg8); |
| 70 | |
| 71 | reg16 = read32(base + 0x0012); |
| 72 | reg16 |= (1 << 0); |
| 73 | write32(base + 0x0012, reg16); |
| 74 | |
| 75 | /* disable Auto Voltage Detector */ |
| 76 | reg8 = pci_read_config8(dev, 0x42); |
| 77 | reg8 |= (1 << 2); |
| 78 | pci_write_config8(dev, 0x42, reg8); |
| 79 | } |
| 80 | |
| 81 | static void hda_init(struct device *dev) |
| 82 | { |
Kevin Paul Herbert | bde6d30 | 2014-12-24 18:43:20 -0800 | [diff] [blame] | 83 | u8 *base; |
Duncan Laurie | c88c54c | 2014-04-30 16:36:13 -0700 | [diff] [blame] | 84 | struct resource *res; |
| 85 | u32 codec_mask; |
Duncan Laurie | c88c54c | 2014-04-30 16:36:13 -0700 | [diff] [blame] | 86 | |
| 87 | /* Find base address */ |
| 88 | res = find_resource(dev, PCI_BASE_ADDRESS_0); |
| 89 | if (!res) |
| 90 | return; |
| 91 | |
Kevin Paul Herbert | bde6d30 | 2014-12-24 18:43:20 -0800 | [diff] [blame] | 92 | base = res2mmio(res, 0, 0); |
| 93 | printk(BIOS_DEBUG, "HDA: base = %p\n", base); |
Duncan Laurie | c88c54c | 2014-04-30 16:36:13 -0700 | [diff] [blame] | 94 | |
| 95 | /* Set Bus Master */ |
Elyes HAOUAS | b887adf | 2020-04-29 10:42:34 +0200 | [diff] [blame] | 96 | pci_or_config16(dev, PCI_COMMAND, PCI_COMMAND_MASTER); |
Duncan Laurie | c88c54c | 2014-04-30 16:36:13 -0700 | [diff] [blame] | 97 | |
| 98 | hda_pch_init(dev, base); |
| 99 | |
| 100 | codec_mask = hda_codec_detect(base); |
| 101 | |
| 102 | if (codec_mask) { |
| 103 | printk(BIOS_DEBUG, "HDA: codec_mask = %02x\n", codec_mask); |
| 104 | codecs_init(base, codec_mask); |
| 105 | } |
| 106 | } |
| 107 | |
Duncan Laurie | 6168027 | 2014-05-05 12:42:35 -0500 | [diff] [blame] | 108 | static void hda_enable(struct device *dev) |
| 109 | { |
Elyes HAOUAS | b887adf | 2020-04-29 10:42:34 +0200 | [diff] [blame] | 110 | u16 reg16; |
Duncan Laurie | 446fb8e | 2014-08-08 09:59:43 -0700 | [diff] [blame] | 111 | u8 reg8; |
| 112 | |
| 113 | reg8 = pci_read_config8(dev, 0x43); |
| 114 | reg8 |= 0x6f; |
| 115 | pci_write_config8(dev, 0x43, reg8); |
Duncan Laurie | 6168027 | 2014-05-05 12:42:35 -0500 | [diff] [blame] | 116 | |
| 117 | if (!dev->enabled) { |
| 118 | /* Route I/O buffers to ADSP function */ |
Duncan Laurie | 446fb8e | 2014-08-08 09:59:43 -0700 | [diff] [blame] | 119 | reg8 = pci_read_config8(dev, 0x42); |
| 120 | reg8 |= (1 << 7) | (1 << 6); |
| 121 | pci_write_config8(dev, 0x42, reg8); |
Duncan Laurie | 6168027 | 2014-05-05 12:42:35 -0500 | [diff] [blame] | 122 | |
| 123 | printk(BIOS_INFO, "HDA disabled, I/O buffers routed to ADSP\n"); |
| 124 | |
| 125 | /* Ensure memory, io, and bus master are all disabled */ |
Elyes HAOUAS | b887adf | 2020-04-29 10:42:34 +0200 | [diff] [blame] | 126 | reg16 = pci_read_config16(dev, PCI_COMMAND); |
| 127 | reg16 &= ~(PCI_COMMAND_MASTER | |
Duncan Laurie | 6168027 | 2014-05-05 12:42:35 -0500 | [diff] [blame] | 128 | PCI_COMMAND_MEMORY | PCI_COMMAND_IO); |
Elyes HAOUAS | b887adf | 2020-04-29 10:42:34 +0200 | [diff] [blame] | 129 | pci_write_config16(dev, PCI_COMMAND, reg16); |
Duncan Laurie | 6168027 | 2014-05-05 12:42:35 -0500 | [diff] [blame] | 130 | |
| 131 | /* Disable this device */ |
| 132 | pch_disable_devfn(dev); |
| 133 | } |
| 134 | } |
| 135 | |
Duncan Laurie | c88c54c | 2014-04-30 16:36:13 -0700 | [diff] [blame] | 136 | static struct device_operations hda_ops = { |
| 137 | .read_resources = &pci_dev_read_resources, |
| 138 | .set_resources = &pci_dev_set_resources, |
| 139 | .enable_resources = &pci_dev_enable_resources, |
| 140 | .init = &hda_init, |
Duncan Laurie | 6168027 | 2014-05-05 12:42:35 -0500 | [diff] [blame] | 141 | .enable = &hda_enable, |
Angel Pons | cb2080f | 2020-10-23 15:45:44 +0200 | [diff] [blame^] | 142 | .ops_pci = &pci_dev_ops_pci, |
Duncan Laurie | c88c54c | 2014-04-30 16:36:13 -0700 | [diff] [blame] | 143 | }; |
| 144 | |
| 145 | static const unsigned short pci_device_ids[] = { |
| 146 | 0x9c20, /* LynxPoint-LP */ |
| 147 | 0x9ca0, /* WildcatPoint */ |
| 148 | 0 |
| 149 | }; |
| 150 | |
| 151 | static const struct pci_driver pch_hda __pci_driver = { |
| 152 | .ops = &hda_ops, |
| 153 | .vendor = PCI_VENDOR_ID_INTEL, |
| 154 | .devices = pci_device_ids, |
| 155 | }; |