Patrick Georgi | ac95903 | 2020-05-05 22:49:26 +0200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-or-later */ |
Jonathan Zhang | 8f89549 | 2020-01-16 11:16:45 -0800 | [diff] [blame] | 2 | |
| 3 | #include <cbfs.h> |
Marc Jones | 8b522db | 2020-10-12 11:58:46 -0600 | [diff] [blame] | 4 | #include <console/console.h> |
Jonathan Zhang | 8f89549 | 2020-01-16 11:16:45 -0800 | [diff] [blame] | 5 | #include <device/pci.h> |
Dinesh Gehlot | 6fecff2 | 2023-01-17 06:02:16 +0000 | [diff] [blame] | 6 | #include <gpio.h> |
Marc Jones | e3b18bf | 2021-01-25 12:23:23 -0700 | [diff] [blame] | 7 | #include <intelblocks/acpi.h> |
Jonathan Zhang | 8f89549 | 2020-01-16 11:16:45 -0800 | [diff] [blame] | 8 | #include <soc/acpi.h> |
Marc Jones | 1f50084 | 2020-10-15 14:32:51 -0600 | [diff] [blame] | 9 | #include <soc/chip_common.h> |
Arthur Heymans | 3d80253 | 2020-11-12 21:17:56 +0100 | [diff] [blame] | 10 | #include <soc/pch.h> |
Tim Chu | 13c4445 | 2022-11-25 10:31:00 +0000 | [diff] [blame] | 11 | #include <soc/soc_pch.h> |
Jonathan Zhang | 8f89549 | 2020-01-16 11:16:45 -0800 | [diff] [blame] | 12 | #include <soc/ramstage.h> |
| 13 | #include <soc/soc_util.h> |
Angel Pons | 9190345 | 2020-10-22 23:06:04 +0200 | [diff] [blame] | 14 | #include <soc/util.h> |
Jonathan Zhang | 8f89549 | 2020-01-16 11:16:45 -0800 | [diff] [blame] | 15 | |
Marc Jones | e3b18bf | 2021-01-25 12:23:23 -0700 | [diff] [blame] | 16 | #if CONFIG(HAVE_ACPI_TABLES) |
| 17 | const char *soc_acpi_name(const struct device *dev) |
| 18 | { |
| 19 | if (dev->path.type == DEVICE_PATH_DOMAIN) |
| 20 | return "PC00"; |
| 21 | return NULL; |
| 22 | } |
| 23 | #endif |
| 24 | |
Jonathan Zhang | 8f89549 | 2020-01-16 11:16:45 -0800 | [diff] [blame] | 25 | static struct device_operations pci_domain_ops = { |
Arthur Heymans | 550f55e | 2022-08-24 14:44:26 +0200 | [diff] [blame] | 26 | .read_resources = iio_pci_domain_read_resources, |
| 27 | .set_resources = pci_domain_set_resources, |
| 28 | .scan_bus = iio_pci_domain_scan_bus, |
Jonathan Zhang | 8f89549 | 2020-01-16 11:16:45 -0800 | [diff] [blame] | 29 | #if CONFIG(HAVE_ACPI_TABLES) |
| 30 | .write_acpi_tables = &northbridge_write_acpi_tables, |
Marc Jones | e3b18bf | 2021-01-25 12:23:23 -0700 | [diff] [blame] | 31 | .acpi_name = soc_acpi_name |
| 32 | #endif |
Jonathan Zhang | 8f89549 | 2020-01-16 11:16:45 -0800 | [diff] [blame] | 33 | }; |
| 34 | |
| 35 | static struct device_operations cpu_bus_ops = { |
Nico Huber | 2f8ba69 | 2020-04-05 14:05:24 +0200 | [diff] [blame] | 36 | .read_resources = noop_read_resources, |
| 37 | .set_resources = noop_set_resources, |
Arthur Heymans | 829e8e6 | 2023-01-30 19:09:34 +0100 | [diff] [blame] | 38 | .init = mp_cpu_bus_init, |
Jonathan Zhang | 8f89549 | 2020-01-16 11:16:45 -0800 | [diff] [blame] | 39 | #if CONFIG(HAVE_ACPI_TABLES) |
| 40 | /* defined in src/soc/intel/common/block/acpi/acpi.c */ |
Nico Huber | 68680dd | 2020-03-31 17:34:52 +0200 | [diff] [blame] | 41 | .acpi_fill_ssdt = generate_cpu_entries, |
Jonathan Zhang | 8f89549 | 2020-01-16 11:16:45 -0800 | [diff] [blame] | 42 | #endif |
| 43 | }; |
| 44 | |
Jonathan Zhang | 8f89549 | 2020-01-16 11:16:45 -0800 | [diff] [blame] | 45 | static void soc_enable_dev(struct device *dev) |
| 46 | { |
| 47 | /* Set the operations if it is a special bus type */ |
| 48 | if (dev->path.type == DEVICE_PATH_DOMAIN) { |
| 49 | dev->ops = &pci_domain_ops; |
| 50 | attach_iio_stacks(dev); |
| 51 | } else if (dev->path.type == DEVICE_PATH_CPU_CLUSTER) { |
| 52 | dev->ops = &cpu_bus_ops; |
Michael Niewöhner | 8913b78 | 2020-12-11 22:13:44 +0100 | [diff] [blame] | 53 | } else if (dev->path.type == DEVICE_PATH_GPIO) { |
| 54 | block_gpio_enable(dev); |
Jonathan Zhang | 8f89549 | 2020-01-16 11:16:45 -0800 | [diff] [blame] | 55 | } |
| 56 | } |
| 57 | |
| 58 | static void soc_init(void *data) |
| 59 | { |
| 60 | printk(BIOS_DEBUG, "coreboot: calling fsp_silicon_init\n"); |
Kyösti Mälkki | cc93c6e | 2021-01-09 22:53:52 +0200 | [diff] [blame] | 61 | fsp_silicon_init(); |
Arthur Heymans | 3d80253 | 2020-11-12 21:17:56 +0100 | [diff] [blame] | 62 | override_hpet_ioapic_bdf(); |
Arthur Heymans | 8346307 | 2020-12-16 11:30:40 +0100 | [diff] [blame] | 63 | pch_lock_dmictl(); |
Jonathan Zhang | 8f89549 | 2020-01-16 11:16:45 -0800 | [diff] [blame] | 64 | } |
| 65 | |
| 66 | static void soc_final(void *data) |
| 67 | { |
| 68 | // Temp Fix - should be done by FSP, in 2S bios completion |
| 69 | // is not carried out on socket 2 |
| 70 | set_bios_init_completion(); |
| 71 | } |
| 72 | |
Jonathan Zhang | 8f89549 | 2020-01-16 11:16:45 -0800 | [diff] [blame] | 73 | void platform_fsp_silicon_init_params_cb(FSPS_UPD *silupd) |
| 74 | { |
| 75 | const struct microcode *microcode_file; |
| 76 | size_t microcode_len; |
| 77 | |
Julius Werner | 834b3ec | 2020-03-04 16:52:08 -0800 | [diff] [blame] | 78 | microcode_file = cbfs_map("cpu_microcode_blob.bin", µcode_len); |
Jonathan Zhang | 8f89549 | 2020-01-16 11:16:45 -0800 | [diff] [blame] | 79 | |
Elyes Haouas | f1ba7d6 | 2022-09-13 10:03:44 +0200 | [diff] [blame] | 80 | if ((microcode_file) && (microcode_len != 0)) { |
Jonathan Zhang | 8f89549 | 2020-01-16 11:16:45 -0800 | [diff] [blame] | 81 | /* Update CPU Microcode patch base address/size */ |
| 82 | silupd->FspsConfig.PcdCpuMicrocodePatchBase = |
| 83 | (uint32_t)microcode_file; |
| 84 | silupd->FspsConfig.PcdCpuMicrocodePatchSize = |
| 85 | (uint32_t)microcode_len; |
| 86 | } |
| 87 | |
Jonathan Zhang | 8f89549 | 2020-01-16 11:16:45 -0800 | [diff] [blame] | 88 | mainboard_silicon_init_params(silupd); |
| 89 | } |
| 90 | |
Andrey Petrov | 662da6c | 2020-03-16 22:46:57 -0700 | [diff] [blame] | 91 | struct chip_operations soc_intel_xeon_sp_skx_ops = { |
| 92 | CHIP_NAME("Intel Skylake-SP") |
Jonathan Zhang | 8f89549 | 2020-01-16 11:16:45 -0800 | [diff] [blame] | 93 | .enable_dev = soc_enable_dev, |
| 94 | .init = soc_init, |
| 95 | .final = soc_final |
| 96 | }; |
| 97 | |
| 98 | struct pci_operations soc_pci_ops = { |
| 99 | .set_subsystem = pci_dev_set_subsystem, |
| 100 | }; |