blob: 6f3546f7f498cf17e1195ad165891e3b087a99dd [file] [log] [blame]
Damien Zammit43a1f782015-08-19 15:16:59 +10001##
2## This file is part of the coreboot project.
3##
4## Copyright (C) 2007-2009 coresystems GmbH
5## Copyright (C) 2015 Damien Zammit <damien@zamaudio.com>
6##
7## This program is free software; you can redistribute it and/or modify
8## it under the terms of the GNU General Public License as published by
9## the Free Software Foundation; version 2 of the License.
10##
11## This program is distributed in the hope that it will be useful,
12## but WITHOUT ANY WARRANTY; without even the implied warranty of
13## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14## GNU General Public License for more details.
15##
16
17config NORTHBRIDGE_INTEL_X4X
18 bool
19
20if NORTHBRIDGE_INTEL_X4X
21
22config NORTHBRIDGE_SPECIFIC_OPTIONS # dummy
23 def_bool y
24 select HAVE_DEBUG_RAM_SETUP
Arthur Heymans524d4972017-09-01 15:45:56 +020025 select LAPIC_MONOTONIC_TIMER
Damien Zammit43a1f782015-08-19 15:16:59 +100026 select VGA
27 select INTEL_GMA_ACPI
Arthur Heymansadc571a2017-09-25 09:40:54 +020028 select CACHE_MRC_SETTINGS
Arthur Heymans4ff675e2018-06-03 10:49:11 +020029 select POSTCAR_STAGE
30 select POSTCAR_CONSOLE
Arthur Heymans4c65bfc2018-04-10 13:34:24 +020031 select SMM_TSEG
Arthur Heymansc82950b2018-04-10 15:16:48 +020032 select PARALLEL_MP
Damien Zammit43a1f782015-08-19 15:16:59 +100033
Martin Roth59ff3402016-02-09 09:06:46 -070034config CBFS_SIZE
35 hex
Arthur Heymans4bc9c282017-04-06 21:37:49 +020036 default 0x100000 if !SOUTHBRIDGE_INTEL_I82801GX
Martin Roth59ff3402016-02-09 09:06:46 -070037
Damien Zammit43a1f782015-08-19 15:16:59 +100038config BOOTBLOCK_NORTHBRIDGE_INIT
39 string
40 default "northbridge/intel/x4x/bootblock.c"
41
42config VGA_BIOS_ID
43 string
44 default "8086,2e32"
45
Arthur Heymans512a2d12017-05-10 13:12:37 +020046config MMCONF_BASE_ADDRESS
47 hex
48 default 0xe0000000
49
Damien Zammit43a1f782015-08-19 15:16:59 +100050endif