blob: f5dd39eb55ab0426384997d5ba256dc04c2f8365 [file] [log] [blame]
Damien Zammit43a1f782015-08-19 15:16:59 +10001##
2## This file is part of the coreboot project.
3##
4## Copyright (C) 2007-2009 coresystems GmbH
5## Copyright (C) 2015 Damien Zammit <damien@zamaudio.com>
6##
7## This program is free software; you can redistribute it and/or modify
8## it under the terms of the GNU General Public License as published by
9## the Free Software Foundation; version 2 of the License.
10##
11## This program is distributed in the hope that it will be useful,
12## but WITHOUT ANY WARRANTY; without even the implied warranty of
13## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14## GNU General Public License for more details.
15##
16
17config NORTHBRIDGE_INTEL_X4X
18 bool
19
20if NORTHBRIDGE_INTEL_X4X
21
22config NORTHBRIDGE_SPECIFIC_OPTIONS # dummy
23 def_bool y
24 select HAVE_DEBUG_RAM_SETUP
Damien Zammit43a1f782015-08-19 15:16:59 +100025 select VGA
26 select INTEL_GMA_ACPI
Kyösti Mälkki122e5bc2016-07-22 22:53:19 +030027 select RELOCATABLE_RAMSTAGE
Damien Zammit43a1f782015-08-19 15:16:59 +100028
Martin Roth59ff3402016-02-09 09:06:46 -070029config CBFS_SIZE
30 hex
Arthur Heymans4bc9c282017-04-06 21:37:49 +020031 default 0x100000 if !SOUTHBRIDGE_INTEL_I82801GX
Martin Roth59ff3402016-02-09 09:06:46 -070032
Damien Zammit43a1f782015-08-19 15:16:59 +100033config BOOTBLOCK_NORTHBRIDGE_INIT
34 string
35 default "northbridge/intel/x4x/bootblock.c"
36
37config VGA_BIOS_ID
38 string
39 default "8086,2e32"
40
Arthur Heymans512a2d12017-05-10 13:12:37 +020041config MMCONF_BASE_ADDRESS
42 hex
43 default 0xe0000000
44
Damien Zammit43a1f782015-08-19 15:16:59 +100045endif