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Angel Ponsbbc99cf2020-04-04 18:51:23 +02001/* SPDX-License-Identifier: GPL-2.0-only */
jinkun.hongac490b82014-06-22 20:40:39 -07002
Julius Wernerdae15a62014-10-15 18:50:45 -07003#include <arch/cache.h>
jinkun.hongac490b82014-06-22 20:40:39 -07004#include <bootblock_common.h>
Julius Werner7a453eb2014-10-20 13:14:55 -07005#include <soc/addressmap.h>
6#include <soc/clock.h>
7#include <soc/grf.h>
8#include <soc/timer.h>
Julius Wernerdae15a62014-10-15 18:50:45 -07009#include <symbols.h>
jinkun.hongac490b82014-06-22 20:40:39 -070010
Julius Wernerc827c9b2023-11-09 12:20:59 -080011_Static_assert(!CONFIG(CBFS_VERIFICATION),
12 "RK3288 doesn't have enough PRERAM_CBFS_CACHE to support the FMAP mapping needed for CBFS verification");
13
Patrick Georgi20864c12015-07-01 20:29:42 +020014void bootblock_soc_init(void)
jinkun.hongac490b82014-06-22 20:40:39 -070015{
David Hendricks3b631612014-09-29 13:37:51 -070016 rkclk_init();
Julius Wernerdae15a62014-10-15 18:50:45 -070017
18 mmu_init();
19 /* Start with a clean slate. */
20 mmu_config_range(0, 4096, DCACHE_OFF);
21 /* SRAM is tightly wedged between registers, need to use subtables. Map
22 * write-through as equivalent for non-cacheable without XN on A17. */
23 mmu_config_range_kb((uintptr_t)_sram/KiB,
Julius Werner7e0dea62019-02-20 18:39:22 -080024 REGION_SIZE(sram)/KiB, DCACHE_WRITETHROUGH);
Julius Wernerdae15a62014-10-15 18:50:45 -070025 dcache_mmu_enable();
Julius Werner33df4952014-12-16 22:48:26 -080026
27 rkclk_configure_crypto(148500*KHz);
jinkun.hongac490b82014-06-22 20:40:39 -070028}