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Raul E Rangelb3c41322020-05-20 14:07:41 -06001# SPDX-License-Identifier: GPL-2.0-or-later
2chip soc/amd/picasso
3
4 # Set FADT Configuration
Raul E Rangelb3c41322020-05-20 14:07:41 -06005 register "fadt_boot_arch" = "ACPI_FADT_LEGACY_DEVICES | ACPI_FADT_8042"
6 register "fadt_flags" = "ACPI_FADT_WBINVD | /* See table 5-34 ACPI 6.3 spec */
7 ACPI_FADT_C1_SUPPORTED |
8 ACPI_FADT_SLEEP_BUTTON |
9 ACPI_FADT_S4_RTC_WAKE |
10 ACPI_FADT_32BIT_TIMER |
Raul E Rangelb3c41322020-05-20 14:07:41 -060011 ACPI_FADT_SEALED_CASE |
12 ACPI_FADT_PCI_EXPRESS_WAKE |
13 ACPI_FADT_REMOTE_POWER_ON"
14
15 register "acp_pin_cfg" = "I2S_PINS_I2S_TDM"
Furquan Shaikha4697362020-07-15 21:25:14 -070016 register "acp_i2s_wake_enable" = "1"
17 register "acpi_pme_enable" = "1"
Raul E Rangelb3c41322020-05-20 14:07:41 -060018
19 # Start : OPN Performance Configuration
20 # (Configuratin that is common for all variants)
21 # For the below fields, 0 indicates use SOC default
22
23 # PROCHOT_L de-assertion Ramp Time
24 register "prochot_l_deassertion_ramp_time" = "20" #mS
25
26 # Lower die temperature limit
27 register "thermctl_limit" = "100" #degrees C
28
29 # FP5 Processor Voltage Supply PSI Currents
30 register "psi0_current_limit" = "18000" #mA
31 register "psi0_soc_current_limit" = "12000" #mA
32 register "vddcr_soc_voltage_margin" = "0" #mV
33 register "vddcr_vdd_voltage_margin" = "0" #mV
34
35 # VRM Limits
36 register "vrm_maximum_current_limit" = "0" #mA
37 register "vrm_soc_maximum_current_limit" = "0" #mA
38 register "vrm_current_limit" = "0" #mA
39 register "vrm_soc_current_limit" = "0" #mA
40
41 # Misc SMU settings
42 register "sb_tsi_alert_comparator_mode_en" = "0"
43 register "core_dldo_bypass" = "1"
44 register "min_soc_vid_offset" = "0"
45 register "aclk_dpm0_freq_400MHz" = "0"
46
47 # End : OPN Performance Configuration
48
49 register "sd_emmc_config" = "SD_EMMC_EMMC_HS400"
50
Lucas Chenc1bb32f2020-05-26 19:31:48 +080051 register "xhci0_force_gen1" = "0"
52
Felix Held1d0154c2020-07-23 19:37:42 +020053 register "has_usb2_phy_tune_params" = "1"
54
Chris Wang1e3e5282020-06-23 21:10:57 +080055 # Controller0 Port0 Default
Felix Held3a7389e2020-07-23 18:22:30 +020056 register "usb_2_port_tune_params[0]" = "{
Chris Wang1e3e5282020-06-23 21:10:57 +080057 .com_pds_tune = 0x03,
58 .sq_rx_tune = 0x3,
59 .tx_fsls_tune = 0x3,
60 .tx_pre_emp_amp_tune = 0x03,
61 .tx_pre_emp_pulse_tune = 0x0,
62 .tx_rise_tune = 0x1,
63 .rx_vref_tune = 0x6,
64 .tx_hsxv_tune = 0x3,
65 .tx_res_tune = 0x01,
66 }"
67
68 # Controller0 Port1 Default
Felix Held3a7389e2020-07-23 18:22:30 +020069 register "usb_2_port_tune_params[1]" = "{
Chris Wang1e3e5282020-06-23 21:10:57 +080070 .com_pds_tune = 0x03,
71 .sq_rx_tune = 0x3,
72 .tx_fsls_tune = 0x3,
73 .tx_pre_emp_amp_tune = 0x03,
74 .tx_pre_emp_pulse_tune = 0x0,
75 .tx_rise_tune = 0x1,
76 .rx_vref_tune = 0x6,
77 .tx_hsxv_tune = 0x3,
78 .tx_res_tune = 0x01,
79 }"
80
81 # Controller0 Port2 Default
Felix Held3a7389e2020-07-23 18:22:30 +020082 register "usb_2_port_tune_params[2]" = "{
Chris Wang1e3e5282020-06-23 21:10:57 +080083 .com_pds_tune = 0x03,
84 .sq_rx_tune = 0x3,
85 .tx_fsls_tune = 0x3,
86 .tx_pre_emp_amp_tune = 0x03,
87 .tx_pre_emp_pulse_tune = 0x0,
88 .tx_rise_tune = 0x1,
89 .rx_vref_tune = 0x6,
90 .tx_hsxv_tune = 0x3,
91 .tx_res_tune = 0x01,
92 }"
93
94 # Controller0 Port3 Default
Felix Held3a7389e2020-07-23 18:22:30 +020095 register "usb_2_port_tune_params[3]" = "{
Chris Wang1e3e5282020-06-23 21:10:57 +080096 .com_pds_tune = 0x03,
97 .sq_rx_tune = 0x3,
98 .tx_fsls_tune = 0x3,
99 .tx_pre_emp_amp_tune = 0x03,
100 .tx_pre_emp_pulse_tune = 0x0,
101 .tx_rise_tune = 0x1,
102 .rx_vref_tune = 0x6,
103 .tx_hsxv_tune = 0x3,
104 .tx_res_tune = 0x01,
105 }"
106
107 # Controller1 Port0 Default
Felix Held3a7389e2020-07-23 18:22:30 +0200108 register "usb_2_port_tune_params[4]" = "{
Chris Wang1e3e5282020-06-23 21:10:57 +0800109 .com_pds_tune = 0x03,
110 .sq_rx_tune = 0x3,
111 .tx_fsls_tune = 0x3,
112 .tx_pre_emp_amp_tune = 0x02,
113 .tx_pre_emp_pulse_tune = 0x0,
114 .tx_rise_tune = 0x1,
115 .rx_vref_tune = 0x5,
116 .tx_hsxv_tune = 0x3,
117 .tx_res_tune = 0x01,
118 }"
119
120 # Controller1 Port1 Default
Felix Held3a7389e2020-07-23 18:22:30 +0200121 register "usb_2_port_tune_params[5]" = "{
Chris Wang1e3e5282020-06-23 21:10:57 +0800122 .com_pds_tune = 0x03,
123 .sq_rx_tune = 0x3,
124 .tx_fsls_tune = 0x3,
125 .tx_pre_emp_amp_tune = 0x02,
126 .tx_pre_emp_pulse_tune = 0x0,
127 .tx_rise_tune = 0x1,
128 .rx_vref_tune = 0x5,
129 .tx_hsxv_tune = 0x3,
130 .tx_res_tune = 0x01,
131 }"
132
Felix Helde2379962020-07-29 01:02:38 +0200133 # USB OC pin mapping
134 register "usb_port_overcurrent_pin[0]" = "USB_OC_PIN_0" # USB C0
135 register "usb_port_overcurrent_pin[1]" = "USB_OC_PIN_1" # USB C1
136 register "usb_port_overcurrent_pin[2]" = "USB_OC_PIN_0" # USB A0
137 register "usb_port_overcurrent_pin[3]" = "USB_OC_PIN_1" # USB A1
138 register "usb_port_overcurrent_pin[4]" = "USB_OC_NONE" # Camera
139 register "usb_port_overcurrent_pin[5]" = "USB_OC_NONE" # Bluetooth
140
Raul E Rangelb3c41322020-05-20 14:07:41 -0600141 # SPI Configuration
142 register "common_config.spi_config" = "{
Rob Barnes13ec6a02020-07-14 13:23:43 -0600143 .normal_speed = SPI_SPEED_33M, /* MHz */
144 .fast_speed = SPI_SPEED_66M, /* MHz */
Raul E Rangelb3c41322020-05-20 14:07:41 -0600145 .altio_speed = SPI_SPEED_66M, /* MHz */
146 .tpm_speed = SPI_SPEED_66M, /* MHz */
Martin Roth637f9412020-07-06 20:02:36 -0600147 .read_mode = SPI_READ_MODE_DUAL122,
Raul E Rangelb3c41322020-05-20 14:07:41 -0600148 }"
149
150 # eSPI Configuration
151 register "common_config.espi_config" = "{
152 .std_io_decode_bitmap = ESPI_DECODE_IO_0x80_EN | ESPI_DECODE_IO_0X60_0X64_EN,
153 .generic_io_range[0] = {
154 .base = 0x62,
155 /*
156 * Only 0x62 and 0x66 are required. But, this is not supported by
157 * standard IO decodes and there are only 4 generic I/O windows
158 * available. Hence, open a window from 0x62-0x67.
159 */
160 .size = 5,
161 },
162 .generic_io_range[1] = {
163 .base = 0x800, /* EC_HOST_CMD_REGION0 */
164 .size = 256, /* EC_HOST_CMD_REGION_SIZE * 2 */
165 },
166 .generic_io_range[2] = {
167 .base = 0x900, /* EC_LPC_ADDR_MEMMAP */
168 .size = 255, /* EC_MEMMAP_SIZE */
169 },
170 .generic_io_range[3] = {
171 .base = 0x200, /* EC_LPC_ADDR_HOST_DATA */
172 .size = 8, /* 0x200 - 0x207 */
173 },
174
175 .io_mode = ESPI_IO_MODE_QUAD,
176 .op_freq_mhz = ESPI_OP_FREQ_33_MHZ,
177 .crc_check_enable = 1,
178 .dedicated_alert_pin = 1,
179 .periph_ch_en = 1,
180 .vw_ch_en = 1,
181 .oob_ch_en = 0,
182 .flash_ch_en = 0,
183
Aaron Durbin76fcf8292020-07-02 11:08:21 -0600184 .vw_irq_polarity = ESPI_VW_IRQ_LEVEL_HIGH(1) | ESPI_VW_IRQ_LEVEL_HIGH(12),
Raul E Rangelb3c41322020-05-20 14:07:41 -0600185 }"
186
187 register "i2c_scl_reset" = "GPIO_I2C2_SCL | GPIO_I2C3_SCL"
188
Raul E Rangelb3c41322020-05-20 14:07:41 -0600189 device cpu_cluster 0 on
190 device lapic 0 on end
191 end
192
193 # See AMD 55570-B1 Table 13: PCI Device ID Assignments.
194 device domain 0 on
195 subsystemid 0x1022 0x1510 inherit
196 device pci 0.0 on end # Root Complex
197 device pci 0.2 on end # IOMMU
198 device pci 1.0 on end # Dummy Host Bridge, must be enabled
199 device pci 1.1 off end # GPP Bridge 0
200 device pci 1.2 on end # GPP Bridge 1 - Wifi
201 device pci 1.3 on end # GPP Bridge 2 - SD
202 device pci 1.4 off end # GPP Bridge 3
203 device pci 1.5 off end # GPP Bridge 4
204 device pci 8.0 on end # Dummy Host Bridge, must be enabled
205 device pci 8.1 on # Internal GPP Bridge 0 to Bus A
206 device pci 0.0 on end # Internal GPU
207 device pci 0.1 on end # Display HDA
208 device pci 0.2 on end # Crypto Coprocesor
Rob Barnesf0d1c9a2020-06-24 09:42:02 -0600209 device pci 0.3 on # USB 3.1
210 chip drivers/usb/acpi
211 register "desc" = ""Root Hub""
212 register "type" = "UPC_TYPE_HUB"
213 device usb 0.0 on
214 chip drivers/usb/acpi
215 register "desc" = ""Left Type-C Port""
216 register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
217 register "group" = "ACPI_PLD_GROUP(1, 1)"
218 device usb 2.0 on end
219 end
220 chip drivers/usb/acpi
221 register "desc" = ""Right Type-C Port""
222 register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
223 register "group" = "ACPI_PLD_GROUP(2, 2)"
224 device usb 2.1 on end
225 end
226 chip drivers/usb/acpi
227 register "desc" = ""Left Type-A Port""
228 register "type" = "UPC_TYPE_USB3_A"
229 register "group" = "ACPI_PLD_GROUP(1, 2)"
230 device usb 2.2 on end
231 end
232 chip drivers/usb/acpi
233 register "desc" = ""Right Type-A Port""
234 register "type" = "UPC_TYPE_USB3_A"
235 register "group" = "ACPI_PLD_GROUP(2, 1)"
236 device usb 2.3 on end
237 end
238 chip drivers/usb/acpi
239 register "desc" = ""User-Facing Camera""
240 register "type" = "UPC_TYPE_INTERNAL"
241 device usb 2.4 on end
242 end
243 chip drivers/usb/acpi
244 register "desc" = ""Bluetooth""
245 register "type" = "UPC_TYPE_INTERNAL"
Rob Barnes56e889c2020-07-23 14:21:23 -0600246 register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_143)"
Rob Barnesf0d1c9a2020-06-24 09:42:02 -0600247 device usb 2.5 on end
248 end
249 chip drivers/usb/acpi
250 register "desc" = ""Left Type-C Port""
251 register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
252 register "group" = "ACPI_PLD_GROUP(1, 1)"
253 device usb 3.0 on end
254 end
255 chip drivers/usb/acpi
256 register "desc" = ""Right Type-C Port""
257 register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
258 register "group" = "ACPI_PLD_GROUP(2, 2)"
259 device usb 3.1 on end
260 end
261 chip drivers/usb/acpi
262 register "desc" = ""Left Type-A Port""
263 register "type" = "UPC_TYPE_USB3_A"
264 register "group" = "ACPI_PLD_GROUP(1, 2)"
265 device usb 3.2 on end
266 end
267 chip drivers/usb/acpi
268 register "desc" = ""Right Type-A Port""
269 register "type" = "UPC_TYPE_USB3_A"
270 register "group" = "ACPI_PLD_GROUP(2, 1)"
271 device usb 3.3 on end
272 end
273 end
274 end
275 end
Furquan Shaikh24ec79c2020-07-16 13:40:28 -0700276 device pci 0.5 on
277 chip drivers/amd/i2s_machine_dev
278 register "hid" = ""AMDI5682""
279 # DMIC select GPIO for ACP machine device
280 # This GPIO is used to select DMIC0 or DMIC1 by the
281 # kernel driver. It does not really have a polarity
282 # since low and high control the selection of DMIC and
283 # hence does not have an active polarity.
284 # Kernel driver does not use the polarity field and
285 # instead treats the GPIO selection as follows:
286 # Set low (0) = Select DMIC0
287 # Set high (1) = Select DMIC1
288 register "dmic_select_gpio" = "ACPI_GPIO_OUTPUT(GPIO_67)"
289 device generic 0.0 on end
290 end
291 end # Audio
Raul E Rangelb3c41322020-05-20 14:07:41 -0600292 device pci 0.6 on end # HDA
293 device pci 0.7 on end # non-Sensor Fusion Hub device
294 end
295 device pci 8.2 on # Internal GPP Bridge 0 to Bus B
296 device pci 0.0 on end # AHCI
297 end
298 device pci 14.0 on end # SM
299 device pci 14.3 on # - D14F3 bridge
300 chip ec/google/chromeec
301 device pnp 0c09.0 on
302 chip ec/google/chromeec/i2c_tunnel
303 register "uid" = "1"
304 register "remote_bus" = "8"
305 device generic 0.0 on
306 chip drivers/i2c/generic
307 register "hid" = ""10EC5682""
308 register "name" = ""RT58""
309 register "uid" = "1"
310 register "desc" = ""Realtek RT5682""
311 register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_BOTH(62)"
Akshu Agrawalc7d6d7a2020-07-06 19:39:51 +0530312 register "property_count" = "2"
Raul E Rangelb3c41322020-05-20 14:07:41 -0600313 register "property_list[0].type" = "ACPI_DP_TYPE_INTEGER"
314 register "property_list[0].name" = ""realtek,jd-src""
315 register "property_list[0].integer" = "1"
Akshu Agrawalc7d6d7a2020-07-06 19:39:51 +0530316 register "property_list[1].type" = "ACPI_DP_TYPE_STRING"
317 register "property_list[1].name" = ""realtek,mclk-name""
318 register "property_list[1].string" = ""oscout1""
Raul E Rangelb3c41322020-05-20 14:07:41 -0600319 device i2c 1a on end
320 end
321 end
322 end
323 chip ec/google/chromeec/i2c_tunnel
324 register "name" = ""MSTH""
325 register "uid" = "1"
326 register "remote_bus" = "9"
327 device generic 1.0 on end
328 end
Furquan Shaikhe284bff2020-07-02 16:03:06 -0700329 chip ec/google/chromeec/audio_codec
330 register "uid" = "1"
331 device generic 0 on end
332 end
Raul E Rangelb3c41322020-05-20 14:07:41 -0600333 end
334 end
335 end
336 device pci 18.0 on end # Data fabric [0-7]
337 device pci 18.1 on end
338 device pci 18.2 on end
339 device pci 18.3 on end
340 device pci 18.4 on end
341 device pci 18.5 on end
342 device pci 18.6 on end
343 end # domain
344
345 chip drivers/generic/max98357a
Raul E Rangel19704cd2020-06-02 10:43:20 -0600346 register "hid" = ""MX98357A""
Raul E Rangelb3c41322020-05-20 14:07:41 -0600347 register "sdmode_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_91)"
348 register "sdmode_delay" = "5"
349 device generic 0.1 on end
350 end
351
352 device mmio 0xfedc5000 on
353 chip drivers/i2c/tpm
354 register "hid" = ""GOOG0005""
355 register "desc" = ""Cr50 TPM""
356 register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_LOW(GPIO_3)"
357 device i2c 50 on end
358 end
359 end
360
Raul E Rangel5e29c0e2020-06-12 11:41:16 -0600361 device mmio 0xfedca000 off end # UART1
362 device mmio 0xfedce000 off end # UART2
363 device mmio 0xfedcf000 off end # UART3
364
Raul E Rangelb3c41322020-05-20 14:07:41 -0600365end # chip soc/amd/picasso