Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
Stefan Reinauer | 54309d6 | 2009-01-20 22:53:10 +0000 | [diff] [blame] | 4 | * Copyright (C) 2008-2009 coresystems GmbH |
Damien Zammit | 647e385 | 2016-01-15 13:44:53 +1100 | [diff] [blame] | 5 | * Copyright (C) 2016 Damien Zammit <damien@zamaudio.com> |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 6 | * |
Stefan Reinauer | a8e1168 | 2009-03-11 14:54:18 +0000 | [diff] [blame] | 7 | * This program is free software; you can redistribute it and/or |
| 8 | * modify it under the terms of the GNU General Public License as |
| 9 | * published by the Free Software Foundation; version 2 of |
| 10 | * the License. |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 11 | * |
| 12 | * This program is distributed in the hope that it will be useful, |
| 13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 15 | * GNU General Public License for more details. |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 16 | */ |
| 17 | |
| 18 | #include <console/console.h> |
| 19 | #include <device/device.h> |
| 20 | #include <device/pci.h> |
| 21 | #include <device/pci_ids.h> |
| 22 | #include "i82801gx.h" |
Damien Zammit | 647e385 | 2016-01-15 13:44:53 +1100 | [diff] [blame] | 23 | #include "sata.h" |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 24 | |
| 25 | typedef struct southbridge_intel_i82801gx_config config_t; |
| 26 | |
Damien Zammit | 647e385 | 2016-01-15 13:44:53 +1100 | [diff] [blame] | 27 | static u8 get_ich7_sata_ports(void) |
| 28 | { |
| 29 | struct device *lpc; |
| 30 | |
Kyösti Mälkki | c70eed1 | 2018-05-22 02:18:00 +0300 | [diff] [blame^] | 31 | lpc = pcidev_on_root(31, 0); |
Damien Zammit | 647e385 | 2016-01-15 13:44:53 +1100 | [diff] [blame] | 32 | |
| 33 | switch (pci_read_config16(lpc, PCI_DEVICE_ID)) { |
| 34 | case 0x27b0: |
| 35 | case 0x27b8: |
| 36 | return 0xf; |
| 37 | case 0x27b9: |
| 38 | case 0x27bd: |
| 39 | return 0x5; |
| 40 | case 0x27bc: |
| 41 | return 0x3; |
| 42 | default: |
| 43 | printk(BIOS_ERR, |
| 44 | "i82801gx_sata: error: cannot determine port config\n"); |
| 45 | return 0; |
| 46 | } |
| 47 | } |
| 48 | |
| 49 | void sata_enable(struct device *dev) |
| 50 | { |
| 51 | /* Get the chip configuration */ |
| 52 | config_t *config = dev->chip_info; |
| 53 | |
| 54 | if (config->sata_ahci) { |
| 55 | /* Set map to ahci */ |
| 56 | pci_write_config8(dev, SATA_MAP, |
| 57 | (pci_read_config8(dev, SATA_MAP) & ~0xc3) | 0x40); |
| 58 | } else { |
| 59 | /* Set map to ide */ |
| 60 | pci_write_config8(dev, SATA_MAP, |
| 61 | pci_read_config8(dev, SATA_MAP) & ~0xc3); |
| 62 | } |
| 63 | |
| 64 | /* At this point, the new pci id will appear on the bus */ |
| 65 | } |
| 66 | |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 67 | static void sata_init(struct device *dev) |
| 68 | { |
| 69 | u32 reg32; |
Stefan Reinauer | a8e1168 | 2009-03-11 14:54:18 +0000 | [diff] [blame] | 70 | u16 reg16; |
Sven Schnelle | b2f173e | 2011-10-27 13:05:40 +0200 | [diff] [blame] | 71 | u32 *ahci_bar; |
Damien Zammit | 647e385 | 2016-01-15 13:44:53 +1100 | [diff] [blame] | 72 | u8 ports; |
Sven Schnelle | b2f173e | 2011-10-27 13:05:40 +0200 | [diff] [blame] | 73 | |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 74 | /* Get the chip configuration */ |
| 75 | config_t *config = dev->chip_info; |
| 76 | |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 77 | printk(BIOS_DEBUG, "i82801gx_sata: initializing...\n"); |
Stefan Reinauer | a8e1168 | 2009-03-11 14:54:18 +0000 | [diff] [blame] | 78 | |
Stefan Reinauer | 573f7d4 | 2009-07-21 21:50:34 +0000 | [diff] [blame] | 79 | if (config == NULL) { |
Uwe Hermann | 607614d | 2010-11-18 20:12:13 +0000 | [diff] [blame] | 80 | printk(BIOS_ERR, "i82801gx_sata: error: device not in devicetree.cb!\n"); |
Stefan Reinauer | 573f7d4 | 2009-07-21 21:50:34 +0000 | [diff] [blame] | 81 | return; |
| 82 | } |
Stefan Reinauer | a8e1168 | 2009-03-11 14:54:18 +0000 | [diff] [blame] | 83 | |
Damien Zammit | 647e385 | 2016-01-15 13:44:53 +1100 | [diff] [blame] | 84 | /* Get ICH7 SATA port config */ |
| 85 | ports = get_ich7_sata_ports(); |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 86 | |
| 87 | /* Enable BARs */ |
Stefan Reinauer | a8e1168 | 2009-03-11 14:54:18 +0000 | [diff] [blame] | 88 | pci_write_config16(dev, PCI_COMMAND, 0x0007); |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 89 | |
| 90 | if (config->ide_legacy_combined) { |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 91 | printk(BIOS_DEBUG, "SATA controller in combined mode.\n"); |
Stefan Reinauer | a8e1168 | 2009-03-11 14:54:18 +0000 | [diff] [blame] | 92 | /* No AHCI: clear AHCI base */ |
| 93 | pci_write_config32(dev, 0x24, 0x00000000); |
| 94 | /* And without AHCI BAR no memory decoding */ |
| 95 | reg16 = pci_read_config16(dev, PCI_COMMAND); |
| 96 | reg16 &= ~PCI_COMMAND_MEMORY; |
| 97 | pci_write_config16(dev, PCI_COMMAND, reg16); |
| 98 | |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 99 | pci_write_config8(dev, 0x09, 0x80); |
| 100 | |
| 101 | /* Set timings */ |
Stefan Reinauer | 573f7d4 | 2009-07-21 21:50:34 +0000 | [diff] [blame] | 102 | pci_write_config16(dev, IDE_TIM_PRI, IDE_DECODE_ENABLE | |
| 103 | IDE_ISP_5_CLOCKS | IDE_RCT_4_CLOCKS); |
| 104 | pci_write_config16(dev, IDE_TIM_SEC, IDE_DECODE_ENABLE | |
| 105 | IDE_ISP_3_CLOCKS | IDE_RCT_1_CLOCKS | |
| 106 | IDE_PPE0 | IDE_IE0 | IDE_TIME0); |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 107 | |
| 108 | /* Sync DMA */ |
Stefan Reinauer | 573f7d4 | 2009-07-21 21:50:34 +0000 | [diff] [blame] | 109 | pci_write_config16(dev, IDE_SDMA_CNT, IDE_SSDE0); |
| 110 | pci_write_config16(dev, IDE_SDMA_TIM, 0x0200); |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 111 | |
Stefan Reinauer | a8e1168 | 2009-03-11 14:54:18 +0000 | [diff] [blame] | 112 | /* Set IDE I/O Configuration */ |
Stefan Reinauer | aca6ec6 | 2009-10-26 17:12:21 +0000 | [diff] [blame] | 113 | reg32 = SIG_MODE_PRI_NORMAL | FAST_PCB1 | FAST_PCB0 | PCB1 | PCB0; |
Stefan Reinauer | a8e1168 | 2009-03-11 14:54:18 +0000 | [diff] [blame] | 114 | pci_write_config32(dev, IDE_CONFIG, reg32); |
| 115 | |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 116 | /* Combine IDE - SATA configuration */ |
Damien Zammit | 647e385 | 2016-01-15 13:44:53 +1100 | [diff] [blame] | 117 | pci_write_config8(dev, SATA_MAP, 0x02); |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 118 | |
Damien Zammit | 1533f13 | 2016-01-16 02:52:53 +1100 | [diff] [blame] | 119 | /* Restrict ports - 0 and 2 only available */ |
| 120 | ports &= 0x5; |
Elyes HAOUAS | 70d79a4 | 2016-08-21 18:36:06 +0200 | [diff] [blame] | 121 | } else if (config->sata_ahci) { |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 122 | printk(BIOS_DEBUG, "SATA controller in AHCI mode.\n"); |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 123 | /* Allow both Legacy and Native mode */ |
| 124 | pci_write_config8(dev, 0x09, 0x8f); |
| 125 | |
| 126 | /* Set Interrupt Line */ |
| 127 | /* Interrupt Pin is set by D31IP.PIP */ |
| 128 | pci_write_config8(dev, INTR_LN, 0x0a); |
| 129 | |
Sven Schnelle | b2f173e | 2011-10-27 13:05:40 +0200 | [diff] [blame] | 130 | ahci_bar = (u32 *)(pci_read_config32(dev, 0x27) & ~0x3ff); |
| 131 | ahci_bar[3] = config->sata_ports_implemented; |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 132 | } else { |
Stefan Reinauer | c02b4fc | 2010-03-22 11:42:32 +0000 | [diff] [blame] | 133 | printk(BIOS_DEBUG, "SATA controller in plain mode.\n"); |
Stefan Reinauer | a8e1168 | 2009-03-11 14:54:18 +0000 | [diff] [blame] | 134 | /* Set Sata Controller Mode. No Mapping(?) */ |
Damien Zammit | 647e385 | 2016-01-15 13:44:53 +1100 | [diff] [blame] | 135 | pci_write_config8(dev, SATA_MAP, 0x00); |
Stefan Reinauer | a8e1168 | 2009-03-11 14:54:18 +0000 | [diff] [blame] | 136 | |
| 137 | /* No AHCI: clear AHCI base */ |
| 138 | pci_write_config32(dev, 0x24, 0x00000000); |
| 139 | |
| 140 | /* And without AHCI BAR no memory decoding */ |
| 141 | reg16 = pci_read_config16(dev, PCI_COMMAND); |
| 142 | reg16 &= ~PCI_COMMAND_MEMORY; |
| 143 | pci_write_config16(dev, PCI_COMMAND, reg16); |
| 144 | |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 145 | /* Native mode capable on both primary and secondary (0xa) |
| 146 | * or'ed with enabled (0x50) = 0xf |
| 147 | */ |
| 148 | pci_write_config8(dev, 0x09, 0x8f); |
| 149 | |
| 150 | /* Set Interrupt Line */ |
| 151 | /* Interrupt Pin is set by D31IP.PIP */ |
| 152 | pci_write_config8(dev, INTR_LN, 0xff); |
Stefan Reinauer | 109ab31 | 2009-08-12 16:08:05 +0000 | [diff] [blame] | 153 | |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 154 | /* Set timings */ |
Stefan Reinauer | 573f7d4 | 2009-07-21 21:50:34 +0000 | [diff] [blame] | 155 | pci_write_config16(dev, IDE_TIM_PRI, IDE_DECODE_ENABLE | |
| 156 | IDE_ISP_3_CLOCKS | IDE_RCT_1_CLOCKS | |
| 157 | IDE_PPE0 | IDE_IE0 | IDE_TIME0); |
| 158 | pci_write_config16(dev, IDE_TIM_SEC, IDE_DECODE_ENABLE | |
Stefan Reinauer | 109ab31 | 2009-08-12 16:08:05 +0000 | [diff] [blame] | 159 | IDE_SITRE | IDE_ISP_3_CLOCKS | |
Stefan Reinauer | 573f7d4 | 2009-07-21 21:50:34 +0000 | [diff] [blame] | 160 | IDE_RCT_1_CLOCKS | IDE_IE0 | IDE_TIME0); |
Stefan Reinauer | 109ab31 | 2009-08-12 16:08:05 +0000 | [diff] [blame] | 161 | |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 162 | /* Sync DMA */ |
Stefan Reinauer | 573f7d4 | 2009-07-21 21:50:34 +0000 | [diff] [blame] | 163 | pci_write_config16(dev, IDE_SDMA_CNT, IDE_SSDE0 | IDE_PSDE0); |
| 164 | pci_write_config16(dev, IDE_SDMA_TIM, 0x0201); |
Stefan Reinauer | 109ab31 | 2009-08-12 16:08:05 +0000 | [diff] [blame] | 165 | |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 166 | /* Set IDE I/O Configuration */ |
Stefan Reinauer | aca6ec6 | 2009-10-26 17:12:21 +0000 | [diff] [blame] | 167 | reg32 = SIG_MODE_PRI_NORMAL | FAST_PCB1 | FAST_PCB0 | PCB1 | PCB0; |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 168 | pci_write_config32(dev, IDE_CONFIG, reg32); |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 169 | } |
| 170 | |
Damien Zammit | 1533f13 | 2016-01-16 02:52:53 +1100 | [diff] [blame] | 171 | /* Set port control */ |
| 172 | pci_write_config8(dev, SATA_PCS, ports); |
| 173 | |
Damien Zammit | 647e385 | 2016-01-15 13:44:53 +1100 | [diff] [blame] | 174 | /* Enable clock gating for unused ports and set initialization reg */ |
| 175 | pci_write_config32(dev, SATA_IR, SIF3(ports) | SIF2 | SIF1 | SCRE); |
| 176 | |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 177 | /* All configurations need this SATA initialization sequence */ |
| 178 | pci_write_config8(dev, 0xa0, 0x40); |
| 179 | pci_write_config8(dev, 0xa6, 0x22); |
| 180 | pci_write_config8(dev, 0xa0, 0x78); |
| 181 | pci_write_config8(dev, 0xa6, 0x22); |
| 182 | pci_write_config8(dev, 0xa0, 0x88); |
| 183 | reg32 = pci_read_config32(dev, 0xa4); |
| 184 | reg32 &= 0xc0c0c0c0; |
| 185 | reg32 |= 0x1b1b1212; |
| 186 | pci_write_config32(dev, 0xa4, reg32); |
| 187 | pci_write_config8(dev, 0xa0, 0x8c); |
| 188 | reg32 = pci_read_config32(dev, 0xa4); |
| 189 | reg32 &= 0xc0c0ff00; |
| 190 | reg32 |= 0x121200aa; |
| 191 | pci_write_config32(dev, 0xa4, reg32); |
| 192 | pci_write_config8(dev, 0xa0, 0x00); |
Stefan Reinauer | 54309d6 | 2009-01-20 22:53:10 +0000 | [diff] [blame] | 193 | |
| 194 | pci_write_config8(dev, PCI_INTERRUPT_LINE, 0); |
Stefan Reinauer | a8e1168 | 2009-03-11 14:54:18 +0000 | [diff] [blame] | 195 | |
| 196 | /* Sata Initialization Register */ |
Damien Zammit | 647e385 | 2016-01-15 13:44:53 +1100 | [diff] [blame] | 197 | reg32 = pci_read_config32(dev, SATA_IR); |
| 198 | reg32 |= SCRD; // due to some bug |
| 199 | pci_write_config32(dev, SATA_IR, reg32); |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 200 | } |
| 201 | |
Elyes HAOUAS | 9966703 | 2018-05-13 12:47:28 +0200 | [diff] [blame] | 202 | static void sata_set_subsystem(struct device *dev, unsigned int vendor, |
| 203 | unsigned int device) |
Stefan Reinauer | a8e1168 | 2009-03-11 14:54:18 +0000 | [diff] [blame] | 204 | { |
| 205 | if (!vendor || !device) { |
| 206 | pci_write_config32(dev, PCI_SUBSYSTEM_VENDOR_ID, |
| 207 | pci_read_config32(dev, PCI_VENDOR_ID)); |
| 208 | } else { |
| 209 | pci_write_config32(dev, PCI_SUBSYSTEM_VENDOR_ID, |
| 210 | ((device & 0xffff) << 16) | (vendor & 0xffff)); |
| 211 | } |
| 212 | } |
| 213 | |
| 214 | static struct pci_operations sata_pci_ops = { |
| 215 | .set_subsystem = sata_set_subsystem, |
| 216 | }; |
| 217 | |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 218 | static struct device_operations sata_ops = { |
| 219 | .read_resources = pci_dev_read_resources, |
| 220 | .set_resources = pci_dev_set_resources, |
| 221 | .enable_resources = pci_dev_enable_resources, |
| 222 | .init = sata_init, |
| 223 | .scan_bus = 0, |
| 224 | .enable = i82801gx_enable, |
Stefan Reinauer | a8e1168 | 2009-03-11 14:54:18 +0000 | [diff] [blame] | 225 | .ops_pci = &sata_pci_ops, |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 226 | }; |
| 227 | |
Patrick Georgi | efff733 | 2012-07-26 19:48:23 +0200 | [diff] [blame] | 228 | static const unsigned short sata_ids[] = { |
| 229 | 0x27c0, /* Desktop Non-AHCI and Non-RAID Mode: 82801GB/GR/GDH (ICH7/ICH7R/ICH7DH) */ |
Patrick Georgi | efff733 | 2012-07-26 19:48:23 +0200 | [diff] [blame] | 230 | 0x27c1, /* Desktop AHCI Mode: 82801GB/GR/GDH (ICH7/ICH7R/ICH7DH) */ |
Damien Zammit | 647e385 | 2016-01-15 13:44:53 +1100 | [diff] [blame] | 231 | 0x27c4, /* Mobile Non-AHCI and Non-RAID Mode: 82801GBM/GHM (ICH7-M/ICH7-M DH) */ |
Patrick Georgi | efff733 | 2012-07-26 19:48:23 +0200 | [diff] [blame] | 232 | 0x27c5, /* Mobile AHCI Mode: 82801GBM/GHM (ICH7-M/ICH7-M DH) */ |
Damien Zammit | 647e385 | 2016-01-15 13:44:53 +1100 | [diff] [blame] | 233 | /* NOTE: Any of the below are not properly supported yet. */ |
| 234 | 0x27c3, /* Desktop RAID mode: 82801GB/GR/GDH (ICH7/ICH7R/ICH7DH) */ |
Patrick Georgi | efff733 | 2012-07-26 19:48:23 +0200 | [diff] [blame] | 235 | 0x27c6, /* ICH7M DH Raid Mode: 82801GHM (ICH7-M DH) */ |
| 236 | 0 |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 237 | }; |
| 238 | |
Patrick Georgi | efff733 | 2012-07-26 19:48:23 +0200 | [diff] [blame] | 239 | static const struct pci_driver i82801gx_sata_driver __pci_driver = { |
Arthur Heymans | 3f111b0 | 2017-03-09 12:02:52 +0100 | [diff] [blame] | 240 | .ops = &sata_ops, |
| 241 | .vendor = PCI_VENDOR_ID_INTEL, |
| 242 | .devices = sata_ids, |
Stefan Reinauer | debb11f | 2008-10-29 04:46:52 +0000 | [diff] [blame] | 243 | }; |