Felix Singer | d959a20 | 2018-09-17 01:26:51 +0200 | [diff] [blame] | 1 | # SPDX-License-Identifier: GPL-2.0-only |
| 2 | |
| 3 | chip soc/intel/skylake |
Michael Niewöhner | 97e21d3 | 2020-12-28 00:49:33 +0100 | [diff] [blame] | 4 | register "panel_cfg" = "{ |
| 5 | .up_delay_ms = 200, // T3 |
| 6 | .down_delay_ms = 0, // T10 |
| 7 | .cycle_delay_ms = 500, // T12 |
| 8 | .backlight_on_delay_ms = 50, // T7 |
| 9 | .backlight_off_delay_ms = 0, // T9 |
| 10 | .backlight_pwm_hz = 200, |
| 11 | }" |
Felix Singer | d959a20 | 2018-09-17 01:26:51 +0200 | [diff] [blame] | 12 | |
| 13 | # IGD Displays |
| 14 | register "gfx" = "GMA_STATIC_DISPLAYS(0)" |
| 15 | |
| 16 | # FSP Configuration |
| 17 | register "SkipExtGfxScan" = "1" |
| 18 | register "SaGv" = "SaGv_Enabled" |
| 19 | register "eist_enable" = "1" |
| 20 | |
| 21 | register "PmConfigSlpS3MinAssert" = "2" # 50ms |
| 22 | register "PmConfigSlpS4MinAssert" = "1" # 1s |
| 23 | register "PmConfigSlpSusMinAssert" = "3" # 500ms |
| 24 | register "PmConfigSlpAMinAssert" = "3" # 2s |
| 25 | |
| 26 | # Send an extra VR mailbox command for the PS4 exit issue |
| 27 | register "SendVrMbxCmd" = "2" |
| 28 | |
| 29 | register "power_limits_config" = "{ |
| 30 | .tdp_pl1_override = 20, |
| 31 | .tdp_pl2_override = 30, |
| 32 | }" |
| 33 | |
| 34 | register "common_soc_config" = "{ |
| 35 | .chipset_lockdown = CHIPSET_LOCKDOWN_COREBOOT, |
| 36 | }" |
| 37 | |
| 38 | register "SerialIoDevMode" = "{ |
| 39 | [PchSerialIoIndexUart2] = PchSerialIoSkipInit, // LPSS UART |
| 40 | }" |
| 41 | |
| 42 | device cpu_cluster 0 on |
| 43 | device lapic 0 on end |
| 44 | end |
| 45 | device domain 0 on |
| 46 | subsystemid 0x1558 0x1313 inherit |
| 47 | device pci 00.0 on end # Host Bridge |
| 48 | device pci 02.0 on end # Integrated Graphics Device |
| 49 | device pci 04.0 on end # SA thermal subsystem |
Felix Singer | d959a20 | 2018-09-17 01:26:51 +0200 | [diff] [blame] | 50 | device pci 14.0 on # USB xHCI |
| 51 | register "SsicPortEnable" = "0" |
| 52 | # USB2 |
| 53 | register "usb2_ports[0]" = "USB2_PORT_MID(OC_SKIP)" # Type-A, right |
| 54 | register "usb2_ports[1]" = "USB2_PORT_FLEX(OC_SKIP)" # 3G / LTE |
| 55 | register "usb2_ports[2]" = "USB2_PORT_TYPE_C(OC_SKIP)" # Type-C, right |
| 56 | register "usb2_ports[3]" = "USB2_PORT_FLEX(OC_SKIP)" # Camera |
| 57 | register "usb2_ports[4]" = "USB2_PORT_FLEX(OC_SKIP)" # Bluetooth |
| 58 | register "usb2_ports[6]" = "USB2_PORT_FLEX(OC_SKIP)" # Type-A, left |
| 59 | register "usb2_ports[7]" = "USB2_PORT_TYPE_C(OC_SKIP)" # Type-C, right |
| 60 | # USB3 |
| 61 | register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC_SKIP)" # Type-A, right |
| 62 | register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC_SKIP)" # 4G |
| 63 | register "usb3_ports[2]" = "USB3_PORT_DEFAULT(OC_SKIP)" # Type C, right |
| 64 | register "usb3_ports[3]" = "USB3_PORT_DEFAULT(OC_SKIP)" # Type-A, left |
| 65 | end |
Felix Singer | d959a20 | 2018-09-17 01:26:51 +0200 | [diff] [blame] | 66 | device pci 14.2 on end # Thermal Subsystem |
Felix Singer | d959a20 | 2018-09-17 01:26:51 +0200 | [diff] [blame] | 67 | device pci 16.0 on # Management Engine Interface 1 |
| 68 | register "HeciEnabled" = "1" |
| 69 | end |
Felix Singer | d959a20 | 2018-09-17 01:26:51 +0200 | [diff] [blame] | 70 | device pci 17.0 on # SATA |
Felix Singer | d959a20 | 2018-09-17 01:26:51 +0200 | [diff] [blame] | 71 | register "SataSalpSupport" = "0" |
| 72 | # Ports |
| 73 | register "SataPortsEnable[0]" = "1" |
| 74 | register "SataPortsEnable[2]" = "1" |
| 75 | register "SataPortsDevSlp[2]" = "1" |
| 76 | end |
| 77 | device pci 19.0 on end # UART 2 |
Felix Singer | d959a20 | 2018-09-17 01:26:51 +0200 | [diff] [blame] | 78 | device pci 1c.0 on # PCI Express Port 1 |
| 79 | device pci 00.0 on end # x4 TBT |
| 80 | register "PcieRpEnable[0]" = "1" |
| 81 | register "PcieRpClkReqSupport[0]" = "1" |
| 82 | register "PcieRpClkReqNumber[0]" = "4" |
| 83 | register "PcieRpClkSrcNumber[0]" = "4" |
| 84 | register "PcieRpHotPlug[0]" = "1" |
| 85 | register "PcieRpLtrEnable[0]" = "1" |
| 86 | smbios_slot_desc "SlotTypePciExpressGen3X4" "SlotLengthOther" "Thunderbolt/Type-C" "SlotDataBusWidth4X" |
| 87 | end |
Felix Singer | d959a20 | 2018-09-17 01:26:51 +0200 | [diff] [blame] | 88 | device pci 1c.4 on # PCI Express Port 5 |
| 89 | device pci 00.0 on end # x1 LAN |
| 90 | register "PcieRpEnable[4]" = "1" |
| 91 | register "PcieRpClkReqSupport[4]" = "1" |
| 92 | register "PcieRpClkReqNumber[4]" = "3" |
| 93 | register "PcieRpClkSrcNumber[4]" = "3" |
| 94 | register "PcieRpLtrEnable[4]" = "1" |
| 95 | end |
| 96 | device pci 1c.5 on # PCI Express Port 6 |
| 97 | device pci 00.0 on end # x1 WLAN |
| 98 | register "PcieRpEnable[5]" = "1" |
| 99 | register "PcieRpClkReqSupport[5]" = "1" |
| 100 | register "PcieRpClkReqNumber[5]" = "2" |
| 101 | register "PcieRpClkSrcNumber[5]" = "2" |
| 102 | register "PcieRpLtrEnable[5]" = "1" |
| 103 | smbios_slot_desc "SlotTypeM2Socket1_SD" "SlotLengthOther" "M.2/A/E 2230 (J_WLAN1)" "SlotDataBusWidth1X" |
| 104 | end |
Felix Singer | d959a20 | 2018-09-17 01:26:51 +0200 | [diff] [blame] | 105 | device pci 1d.0 on # PCI Express Port 9 |
| 106 | device pci 00.0 on end # x4 M.2/M (J_SSD1) |
| 107 | register "PcieRpEnable[8]" = "1" |
| 108 | register "PcieRpClkReqSupport[8]" = "1" |
| 109 | register "PcieRpClkReqNumber[8]" = "5" |
| 110 | register "PcieRpClkSrcNumber[8]" = "5" |
| 111 | register "PcieRpLtrEnable[8]" = "1" |
| 112 | smbios_slot_desc "SlotTypeM2Socket3" "SlotLengthOther" "M.2/M 2280 (J_SSD1)" "SlotDataBusWidth4X" |
| 113 | end |
Felix Singer | d959a20 | 2018-09-17 01:26:51 +0200 | [diff] [blame] | 114 | device pci 1f.0 on # LPC Interface |
| 115 | register "gen1_dec" = "0x000c0681" |
| 116 | register "gen2_dec" = "0x000c1641" |
Michael Niewöhner | c5f1dc9 | 2021-04-10 22:51:15 +0200 | [diff] [blame^] | 117 | register "gen3_dec" = "0x00040069" |
Felix Singer | d959a20 | 2018-09-17 01:26:51 +0200 | [diff] [blame] | 118 | register "serirq_mode" = "SERIRQ_CONTINUOUS" |
| 119 | chip drivers/pc80/tpm |
| 120 | device pnp 0c31.0 on end |
| 121 | end |
| 122 | end |
| 123 | device pci 1f.1 hidden end # P2SB |
| 124 | device pci 1f.2 on # Power Management Controller |
| 125 | register "gpe0_dw0" = "GPP_C" |
| 126 | register "gpe0_dw1" = "GPP_D" |
| 127 | register "gpe0_dw2" = "GPP_E" |
| 128 | end |
| 129 | device pci 1f.3 on end # Intel HDA |
| 130 | device pci 1f.4 on end # SMBus |
| 131 | device pci 1f.5 on end # PCH SPI |
Felix Singer | d959a20 | 2018-09-17 01:26:51 +0200 | [diff] [blame] | 132 | end |
| 133 | end |